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STA330 Datasheet(PDF) 47 Page - STMicroelectronics |
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STA330 Datasheet(HTML) 47 Page - STMicroelectronics |
47 / 55 page STA330 Registers 47/55 ADCCFG ADC configuration register Address: 0x1E Type: RO Buffer: No Reset: Undefined Description: CKOCFG Clock-out configuration register Address: 0x1F Type: R/W Buffer: No Reset: Undefined Description: Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 PGA[2:0] INSEL STBY BYPASS_CALIB CLKENBL 7:5 PGA[2:0]: gain selection bits for the ADC programmable gain amplifier: 000: default Values are from 0 to 42 dB in 6 dB steps 4 INSEL: 0: line input selected (default) 1: microphone input selected (INL is the input) 3 STBY: ADC standby mode: 0: ADC in power-up mode (default) 1: ADC in standby mode 2 BYPASS_CALIB: 0: ADC DC-removal block not bypassed (default) 1: ADC DC-removal block bypassed 1 CLKENBL: Clock enable: 0: system clock not enabled 1: system clock available at ADC input (default) 0Reserved Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 CLKOUT_DIS CLKOUT_SEL[1:0] 7 CLKOUT_DIS: CLKOUT PAD disabled 0: default 1: disabled 6:5 CLKOUT_SEL[1:0]: 00: default The CLKOUT output frequency is the PLL output frequency divided by 2CLKOUT_SEL. 4:0 Reserved |
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