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SST89E554RC-40-I-NI Datasheet(PDF) 56 Page - Silicon Storage Technology, Inc

No. de pieza SST89E554RC-40-I-NI
Descripción Electrónicos  FlashFlex51 MCU
Download  86 Pages
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Fabricante Electrónico  SST [Silicon Storage Technology, Inc]
Página de inicio  http://www.sst.com/
Logo SST - Silicon Storage Technology, Inc

SST89E554RC-40-I-NI Datasheet(HTML) 56 Page - Silicon Storage Technology, Inc

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Data Sheet
FlashFlex51 MCU
SST89E564RD / SST89V564RD / SST89E554RC / SST89V554RC
©2003 Silicon Storage Technology, Inc.
S71207-04-000
12/03
8.3.5 Watchdog Timer
The Watchdog Timer mode is used to improve reliability in
the system without increasing chip count (See Figure 8-6).
Watchdog Timers are useful for systems that are suscepti-
ble to noise, power glitches, or electrostatic discharge. It
can also be used to prevent a software deadlock. If during
the execution of the user’s code, there is a deadlock, the
Watchdog Timer will time out and an internal reset will
occur. Only module 4 can be programmed as a Watchdog
Timer (but still can be programmed to other modes if the
Watchdog Timer is not used).
To use the Watchdog Timer, the user pre-loads a 16-bit
value in the compare register. Just like the other compare
modes, this 16-bit value is compared to the PCA timer
value. If a match is allowed to occur, an internal reset will be
generated. This will not cause the RST pin to be driven high.
In order to hold off the reset, the user has three options:
1. periodically change the compare value so it will
never match the PCA timer,
2. periodically change the PCA timer value so it will
never match the compare values, or
3. disable the watchdog timer by clearing the WDTE
bit before a match occurs and then re-enable it.
The first two options are more reliable because the Watch-
dog Timer is never disabled as in option #3. If the program
counter ever goes astray, a match will eventually occur and
cause an internal reset. The second option is also not rec-
ommended if other PCA modules are being used. Remem-
ber, the PCA timer is the time base for all modules;
changing the time base for other modules would not be a
good idea. Thus, in most application the first solution is the
best option.
Use the code below to initialize the Watchdog Timer. Mod-
ule 4 can be configured in either compare mode, and the
WDTE bit in CMOD must also be set. The user’s software
then must periodically change (CCAP4H, CCAP4L) to
keep a match from occurring with the PCA timer (CH, CL).
This code is given in the Watchdog routine below.
;==============================================
Init_Watchdog:
MOV
CCAPM4, #4CH; Module 4 in compare mode
MOV
CCAP4L, #0FFH; Write to low byte first
MOV
CCAP4H, #0FFH; Before PCA timer counts up
; to FFFF Hex, these compare
; values must be changed.
ORL
CMOD, #40H; Set the WDTE bit to enable the
; watchdog timer without
; changing the other bits in
; CMOD
;==============================================
;Main program goes here, but call WATCHDOG periodically.
;==============================================
WATCHDOG:
CLR
EA; Hold off interrupts
MOV
CCAP4L, #00; Next compare value is within
MOV
CCAP4H, CH; 65,535 counts of the
; current PCA
SETB EA; timer value
RET
;==============================================
This routine should not be part of an interrupt service rou-
tine. If the program counter goes astray and gets stuck in an
infinite loop, interrupts will still be serviced and the watchdog
will keep getting reset. Thus, the purpose of the watchdog
would be defeated. Instead, call this subroutine from the
main program of the PCA timer.
FIGURE
8-6: PCA WATCHDOG TIMER (MODULE 4 ONLY)
1207 F39.2
CIDL
WDTE
CPS1
CPS0
ECF
ECOMn CAPPn CAPNn
MATn
TOGn
PWMn ECCFn
CMOD
CCAPM4
Reset
CH
CL
CCAP4H
CCAP4L
PCA Timer/Counter
0
0X
0
16-bit Comparator
Reset
Write to
CCAP4L
Write to
CCAP4H
10
Enable
Match
Module 4
1X


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