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SST89E554RC-40-I-TQI Datasheet(PDF) 34 Page - Silicon Storage Technology, Inc |
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SST89E554RC-40-I-TQI Datasheet(HTML) 34 Page - Silicon Storage Technology, Inc |
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34 / 86 page  34 Data Sheet FlashFlex51 MCU SST89E564RD / SST89V564RD / SST89E554RC / SST89V554RC ©2003 Silicon Storage Technology, Inc. S71207-04-000 12/03 4.1.1 Product Identification The Read-ID command accesses the Signature Bytes that identify the device and the manufacturer as SST. External programmers primarily use these Signature Bytes in the selection of programming algorithms. The Read-ID com- mand is selected by the command code of 0H on P3[7:6] and P2[7:6]. See Figure 13-14 for timing waveforms. 4.1.2 Arming Command An arming command sequence must take place before any external host mode sequence command is recognized by the device. This prevents accidental triggering of exter- nal host mode commands due to noise or programmer error. The arming command is as follows: 1. PSEN# goes low while RST is high. This will get the machine in external host mode, re-configuring the pins, and turning on the on-chip oscillator. 2. A Read-ID command is issued, and after 1 ms the external host mode commands can be issued. After the above sequence, all other external host mode commands are enabled. Before the Read-ID command is received, all other external host mode commands received are ignored. 4.1.3 External Host Mode Commands The external host mode commands are Read-ID, Chip- Erase, Block-Erase, Sector-Erase, Byte-Program, Byte- Verify, Prog-SB1, Prog-SB2, Prog-SB3, Prog-SC0, Prog- SC1, Select-Block0, Select-Block1. See Tables 4-1 and 4-2 for all signal logic assignments, Figure 4-1 for I/O pin assignments, and Table 13-11 for the timing parameters. The critical timing for all Erase and Program commands is generated by an on-chip flash memory controller. The high- to-low transition of the PROG# signal initiates the Erase or Program commands, which are synchronized internally. The Read commands are asynchronous reads, indepen- dent of the PROG# signal level. A detailed description of the external host mode com- mands follows. The Select-Block0 command enables Block 0 to be pro- grammed in external host mode. Once this command is executed, all subsequent external host Commands will be directed at Block 0. See Figure 13-15 for timing waveforms. This command applies to SST89E564RD/ SST89V564RD only. The Select-Block1 command enables Block 1 (8 KByte Block) to be programmed. Once this command is exe- cuted, all subsequent external host Commands that are directed to the address range below 2000H will be directed at Block 1. The Select-Block1 command only affects the lowest 8 KByte of the program address space. For addresses greater than or equal to 2000H, Block 0 is accessed by default. Upon entering external host mode, Block 1 is selected by default. See Figure 13-15 for timing waveforms. This command applies to SST89E564RD/ SST89V564RD only. The Chip-Erase, Block-Erase, and Sector-Erase com- mands are used for erasing all or part of the memory array. Erased data bytes in the memory array will be erased to FFH. Memory locations that are to be programmed must be in the erased state prior to programming. The Chip-Erase command erases all bytes in both memory blocks, regardless of any previous Select-Block0 or Select- Block1 commands. Chip-Erase ignores the Security Lock status and will erase the Security Lock, returning the device to its Unlocked state. The Chip-Erase command will also erase the SC0 bit. Upon completion of Chip-Erase com- mand, Block 1 will be the selected block. See Figure 13-16 for timing waveforms. The Block-Erase command erases all bytes in the selected memory blocks. This command will not be executed if the security lock is enabled. The selection of the memory block to be erased is determined by the prior execution Select- Block0 or Select-Block1 command. See Figures 13-17 and 13-18 for the timing waveforms. The Sector-Erase command erases all of the bytes in a sector. The sector size for the flash memory is 128 Bytes. This command will not be executed if the Security lock is enabled. See Figure 13-19 for timing waveforms. The Byte-Program command is used for programming new data into the memory array. Programming will not take place if any security locks are enabled. See Figure 13-20 for timing waveforms. The Byte-Verify command allows the user to verify that the device correctly performed an Erase or Program com- mand. This command will be disabled if any security locks are enabled. See Figure 13-23 for timing waveforms. TABLE 4-3: PRODUCT IDENTIFICATION Address Data Manufacturer’s ID 30H BFH Device ID SST89E564RD 31H 91H SST89V564RD 31H 90H SST89E554RC 31H 99H SST89V554RC 31H 98H T4-3.0 1207 |
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