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SST89E58RD2-40-C-NI Datasheet(PDF) 51 Page - Silicon Storage Technology, Inc |
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SST89E58RD2-40-C-NI Datasheet(HTML) 51 Page - Silicon Storage Technology, Inc |
51 / 81 page Data Sheet FlashFlex51 MCU SST89E52RD2/RD / SST89E54RD2/RD / SST89E58RD2/RD SST89V52RD2/RD / SST89V54RD2/RD / SST89V58RD2/RD 51 ©2006 Silicon Storage Technology, Inc. S71255-05-000 5/06 8.3.2 16-Bit Software Timer Mode The 16-bit software timer mode is used to trigger interrupt routines, which must occur at periodic intervals. It is setup by setting both the ECOM and MAT bits in the module’s CCAPMn register. The PCA timer will be compared to the module’s capture registers (CCAPnL and CCAPnH) and when a match occurs, an interrupt will occur, if the CCFn (CCON SFR) and the ECCFn (CCAPMn SFR) bits for the module are both set. If necessary, a new 16-bit compare value can be loaded into CCAPnH and CCAPnL during the interrupt routine. The user should be aware that the hardware temporarily disables the comparator function while these registers are being updated so that an invalid match will not occur. Thus, it is recommended that the user write to the low byte first (CCAPnL) to disable the comparator, then write to the high byte (CCAPnH) to re-enable it. If any updates to the regis- ters are done, the user may want to hold off any interrupts from occurring by clearing the EA bit. (See Figure 8-3) FIGURE 8-3: PCA Compare Mode (Software Timer) 1255 F25.0 CF CR CCF4 CCF3 CCF2 CCF1 CCF0 ECOMn CAPPn CAPNn MATn TOGn PWMn ECCFn CCON CCAPMn n=0 to 4 PCA Interrupt CH CL CCAPnH CCAPnL PCA Timer/Counter 0 00 0 16-bit Comparator Reset Write to CCAPnL Write to CCAPnH 10 Enable Match |
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