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ST10F168-Q3 Datasheet(PDF) 10 Page - STMicroelectronics |
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ST10F168-Q3 Datasheet(HTML) 10 Page - STMicroelectronics |
10 / 74 page ST10F168 10/74 3 - FUNCTIONAL DESCRIPTION The architecture of the ST10F168 combines advantages of both RISC and CISC processors and an advanced peripheral subsystem. The block diagram gives an overview of the different on-chip components and the high bandwidth internal bus structure of the ST10F168. Figure 3 : Block Diagram Port 6 Port 5 Port 3 BRG CPU-Core Internal RAM Watchdog Interrupt Controller 8 16 32 16 PEC 16 16 CAN Port 7 Port 8 BRG 16 16 OSC. 6K Byte 16 16 8 16 256K Byte + PLL XRAM Flash memory CAN_RxD P4.5 CAN_TxD P4.6 XTAL1 XTAL2 15 8 8 |
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