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ST10F280-JT3 Datasheet(PDF) 11 Page - STMicroelectronics |
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ST10F280-JT3 Datasheet(HTML) 11 Page - STMicroelectronics |
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11 / 186 page  ST10F280 11/186 P3.0 - P3.13, P3.15 I/O Port 3 is a 15-bit (P3.14 is missing) bidirectional I/O port. It is bit-wise program- mable for input or output via direction bits. For a pin configured as input, the out- put driver is put into high-impedance state. Port 3 outputs can be configured as push/pull or open drain drivers. The input threshold of Port 3 is selectable (TTL or special). The following Port 3 pins also serve for alternate functions: R12 I P3.0 T0IN CAPCOM Timer T0 Count Input T13 O P3.1 T6OUT GPT2 Timer T6 Toggle Latch Output P12 I P3.2 CAPIN GPT2 Register CAPREL Capture Input R13 O P3.3 T3OUT GPT1 Timer T3 Toggle Latch Output T14 I P3.4 T3EUD GPT1 Timer T3 External Up / Down Control Input P13 I P3.5 T4IN GPT1 Timer T4 Input for Count / Gate / Reload / Capture R14 I P3.6 T3IN GPT1 Timer T3 Count / Gate Input P14 I P3.7 T2IN GPT1 Timer T2 Input for Count / Gate / Reload / Capture R15 I/O P3.8 MRST SSC Master-Receive / Slave-Transmit I/O R16 I/O P3.9 MTSR SSC Master-Transmit / Slave-Receive O/I N14 I/O P3.10 TxD0 ASC0 Clock / Data Output (Asynchronous / Synchronous) P15 O P3.11 RxD0 ASC0 Data Input (Asynchronous) or I/O (Synchronous) P16 O P3.12 BHE External Memory High Byte Enable Signal, WRH External Memory High Byte Write Strobe M14 I/O P3.13 SCLK SSC Master Clock Output / Slave Clock Input T17 O P3.15 CLKOUT System Clock Output (=CPU Clock) P4.0 – P4.7 I/O Port 4 is an 8-bit bidirectional I/O port. It is bit-wise programmable for input or output via direction bits. For a pin configured as input, the output driver is put into high-impedance state. The input threshold is selectable (TTL or special). P4.6 & P4.7 outputs can be configured as push-pull or open-drain drivers. In case of an external bus configuration, Port 4 can be used to output the seg- ment address lines: N16 O P4.0 A16 Least Significant Segment Address Line M15 O P4.1 A17 Segment Address Line L14 O P4.2 A18 Segment Address Line M16 O P4.3 A19 Segment Address Line L15 O I P4.4 A20 Segment Address Line CAN2_RxD CAN2 Receive Data Input L16 O I P4.5 A21 Segment Address Line CAN1_RxD CAN1 Receive Data Input K14 O O P4.6 A22 Segment Address Line, CAN_TxD CAN1_TxD CAN1 Transmit Data Output K15 O O P4.7 A23 Most Significant Segment Address Line CAN2_TxD CAN2 Transmit Data Output Table 1 : Ball Description (continued) Symbol Ball Number Type Function |
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