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TPS63011YFFR Datasheet(PDF) 4 Page - Texas Instruments |
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TPS63011YFFR Datasheet(HTML) 4 Page - Texas Instruments |
4 / 27 page PIN ASSIGNMENTS B1 A1 C1 D1 E1 B2 A2 C2 D2 E2 B3 A3 C3 D3 E3 B4 A4 C4 D4 E4 TPS63010 TPS63011 TPS63012 SLVS653 – JUNE 2008 ...................................................................................................................................................................................................... www.ti.com YFF PACKAGE (TOP VIEW) Terminal Functions TERMINAL I/O DESCRIPTION NAME NO. EN A4 I Enable input. (1 enabled, 0 disabled) I Voltage feedback of adjustable versions, must be connected to VOUT at fixed output FB E3 voltage versions GND C3, D3, E4 Control / logic ground PS C4 I Enable / disable power save mode (1 disabled, 0 enabled) L1 B1,B2 I Connection for Inductor L2 D1,D2 I Connection for Inductor PGND C1,C2 Power ground SYNC B4 I Clock signal for synchronization, should be connected to GND if not used Output voltage select for fixed output voltage options (1 programs higher output voltage VSEL D4 I option, 0 programs lower output voltage option), must be connected to a defined logic signal at adjustable output voltage option. VIN A1, A2 I Supply voltage for power stage VINA A3 I Supply voltage for control stage VINA1 B3 O Output of the 100 Ω for designing the VINA filter VOUT E1,E2 O Buck-boost converter output 4 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TPS63010 TPS63011 TPS63012 |
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