List of Tables
Table 1.
Documentation Conventions ............................................................................................ 21
Table 3-1.
Memory Map ................................................................................................................... 43
Table 4-1.
Exception Types .............................................................................................................. 45
Table 4-2.
Interrupts ........................................................................................................................ 46
Table 5-1.
JTAG Port Pins Reset State ............................................................................................. 50
Table 5-2.
JTAG Instruction Register Commands ............................................................................... 55
Table 6-1.
System Control Register Map ........................................................................................... 65
Table 6-2.
VADJ to VOUT ................................................................................................................ 70
Table 6-3.
Default Crystal Field Values and PLL Programming ........................................................... 78
Table 7-1.
Hibernation Module Register Map ................................................................................... 118
Table 8-1.
Flash Protection Policy Combinations ............................................................................. 133
Table 8-2.
Flash Resident Registers ............................................................................................... 134
Table 8-3.
Internal Memory Register Map ........................................................................................ 134
Table 9-1.
GPIO Pad Configuration Examples ................................................................................. 158
Table 9-2.
GPIO Interrupt Configuration Example ............................................................................ 159
Table 9-3.
GPIO Register Map ....................................................................................................... 160
Table 10-1.
16-Bit Timer With Prescaler Configurations ..................................................................... 200
Table 10-2.
Timers Register Map ...................................................................................................... 206
Table 11-1.
Watchdog Timer Register Map ........................................................................................ 230
Table 12-1.
Samples and FIFO Depth of Sequencers ........................................................................ 253
Table 12-2.
ADC Register Map ......................................................................................................... 257
Table 13-1.
UART Register Map ....................................................................................................... 291
Table 14-1.
SSI Register Map .......................................................................................................... 335
Table 15-1.
Examples of I
2C Master Timer Period versus Speed Mode ............................................... 362
Table 15-2.
Inter-Integrated Circuit (I
2C) Interface Register Map ......................................................... 371
Table 15-3.
Write Field Decoding for I2CMCS[3:0] Field (Sheet 1 of 3) ................................................ 376
Table 16-1.
Transmit Message Object Bit Settings ............................................................................. 398
Table 16-2.
Receive Message Object Bit Settings .............................................................................. 400
Table 16-3.
CAN Protocol Ranges .................................................................................................... 402
Table 16-4.
CAN Register Map ......................................................................................................... 405
Table 17-1.
Comparator 0 Operating Modes ...................................................................................... 439
Table 17-2.
Internal Reference Voltage and ACREFCTL Field Values ................................................. 440
Table 17-3.
Analog Comparators Register Map ................................................................................. 441
Table 18-1.
PWM Register Map ........................................................................................................ 454
Table 18-2.
PWM Generator Action Encodings .................................................................................. 475
Table 19-1.
QEI Register Map .......................................................................................................... 483
Table 21-1.
Signals by Pin Number ................................................................................................... 498
Table 21-2.
Signals by Signal Name ................................................................................................. 502
Table 21-3.
Signals by Function, Except for GPIO ............................................................................. 506
Table 21-4.
GPIO Pins and Alternate Functions ................................................................................. 509
Table 22-1.
Temperature Characteristics ........................................................................................... 512
Table 22-2.
Thermal Characteristics ................................................................................................. 512
Table 23-1.
Maximum Ratings .......................................................................................................... 513
Table 23-2.
Recommended DC Operating Conditions ........................................................................ 513
Table 23-3.
LDO Regulator Characteristics ....................................................................................... 514
Table 23-4.
Detailed Power Specifications ........................................................................................ 515
11
June 04, 2007
Preliminary
LM3S2739 Microcontroller