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ST52T301P Datasheet(PDF) 8 Page - STMicroelectronics |
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ST52T301P Datasheet(HTML) 8 Page - STMicroelectronics |
8 / 100 page It is not possibile to stop the fuzzy inference before the end of the defuzzificationof one output.Aset of 26 different arithmetic and logic instructions is available.Each instruction requiresfrom 4 to 7 clock pulses to be performed. 2.1.1 Program Counter The Program Counter (PC) is a 11-bit register that contains the address of the next memory location to be processed by the core. This memory location may be an opcode,an operand or an address of an operand. The 11-bit length allows the direct addressing mode of 2048 bytes in the program space. After having read the current instruction address, the PC value is incremented. To execute relative jumps the PC and the offset are shifted through the Fuzzy Core or the ALU, where they will be added. The result of this operation is shifted back into the PC. The PC can be changed in the following ways: JP (Jump) instruction PC = Jump Address Interrupt PC = Interrupt Vector RETI instruction PC = Pop (stack) Reset PC = Reset Vector Normal Instruction PC = PC + 1 2.1.2 Flags The ST52x301 core includes two pairs of flags that correspond to 2 different modes: normal mode and interrupt mode. Each pair consist of a CARRY flag and a ZERO flag. One pair (CN, ZN) is used during normal operation and one is used during the interrupt mode (CI, ZI). The ST52x301 core uses the pair of flags that correspond to the actual mode: as soon as an interrupt is generated, the ST52x301 core uses the interrupt flags instead of the normal flags.When the RETI instruction is executed the normal flags are restored if the MCU was in the normal mode before the interrupt. It should be observed that each flag set can only be addressed in its own routine. The flags are not cleared during the context switching and remain in the state they were at the exit of the last routine switching. The Carry flag is set when a carry or a borrow occurs during arithmetic operations, otherwise it is cleared. The switching between the two sets of flags is automatically performed when an interrupt or a RETI instruction occur. 2.2 ADDRESS SPACES W.A.R.P3TC has four separate address spaces: Register File: 16 8-bit registers Input Registers: 11 8-bit registers Configuration Registers: 16 8-bit registers Peripheral Registers: 3 8-bit registers Program memory up to 2K Bytes The Program memory will be described in further detail in the MEMORYsection 2.2.1 Register File The Register File (RF) consists of 16 general purpose 8-bit registers Reg0 to Reg15. All the registers in the RF can be specified by using a decimal address, e.g. 0 identify the first register of the RF, called Reg0. Reg0:3 are directly connected to the FC input. It means that the input values of the fuzzy algorithm must be loaded into these registers by the user. These registers are used as temporary registers during the macros’ computation. 8/99 ST52T301/E301 |
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