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ST6215C Datasheet(PDF) 6 Page - STMicroelectronics

No. de Pieza. ST6215C
Descripción  8-BIT MCUs WITH A/D CONVERTER, TWO TIMERS, OSCILLATOR SAFEGUARD & SAFE RESET
Descarga  105 Pages
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Fabricante  STMICROELECTRONICS [STMicroelectronics]
Página de inicio  http://www.st.com
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ST6215C Datasheet(HTML) 6 Page - STMicroelectronics

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ST6215C/ST6225C
6/105
1 INTRODUCTION
The ST6215C, 25C devices are low cost members
of the ST62xx 8-bit HCMOS family of microcontrol-
lers, which is targeted at low to medium complexity
applications. All ST62xx devices are based on a
building block approach: a common core is sur-
rounded by a number of on-chip peripherals.
The ST62E25C is the erasable EPROM version of
the ST62T15C, T25C devices, which may be used
during the development phase for the ST62T15C,
T25C target devices, as well as the respective
ST6215C, 25C ROM devices.
OTP and EPROM devices are functionally identi-
cal. OTP devices offer all the advantages of user
programmability at low cost, which make them the
ideal choice in a wide range of applications where
frequent code changes, multiple code versions or
last minute programmability are required.
The ROM based versions offer the same function-
ality, selecting the options defined in the program-
mable option bytes of the OTP/EPROM versions
in the ROM option list (See Section 12.6 on page
97).
The ST62P15C/P25C are the Factory Advanced
Service Technique ROM (FASTROM) versions of
ST62T15C,T25C OTP devices.
They offer the same functionality as OTP devices,
but they do not have to be programmed by the
customer (See Section 12 on page 91).
These compact low-cost devices feature a Timer
comprising an 8-bit counter with a 7-bit program-
mable prescaler, an 8-bit A/D Converter with 16
analog inputs and a Digital Watchdog timer, mak-
ing them well suited for a wide range of automo-
tive, appliance and industrial applications.
For easy reference, all parametric data is located
in Section 11 on page 63.
Figure 1. Block Diagram
NMI
INTERRUPTS
PROGRAM
PC
STACK LEVEL 1
STACK LEVEL 2
STACK LEVEL 3
STACK LEVEL 4
STACK LEVEL 5
STACK LEVEL 6
POWER
SUPPLY
OSCILLATOR
RESET
DATA ROM
USER
SELECTABLE
DATA RAM
64 Bytes
PORT A
PORT B
PORT C
TIMER
8-BIT CORE
8-BIT
A/D CONVERTER
PA0..PA3 (20mA Sink)
PA4..PA7 / Ain
PB0..PB7 / Ain
PC4..PC7 / Ain
TIMER
VDD VSS OSCin OSCout
RESET
WATCHDOG
:
MEMORY
TIMER
(2K or 4K Bytes)
VPP
4


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