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CAT5132ZI-50-GT3 Datasheet(PDF) 3 Page - Catalyst Semiconductor |
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CAT5132ZI-50-GT3 Datasheet(HTML) 3 Page - Catalyst Semiconductor |
3 / 14 page CAT5132 3 Doc No. MD-2124, Rev. E © Catalyst Semiconductor, Inc. Characteristics subject to change without notice RECOMMENDED OPERATING CONDITIONS VCC = +2.7V to +5.5V V+ = +8.0V to +16V Operating Temperature Range: -40˚C to +85˚C ABSOLUTE MAXIMUM RATINGS Temperature Under Bias....................-55˚C to +125˚C Storage Temperature ........................ -65˚C to +150˚C Voltage on any SDA, SCL, A0 & A1 pins with respect to Ground (1) ................................. -0.3V to VCC + 0.3V Voltage on RH, RL & RW pins with respect to Ground ................................................................ V+ VCC with respect to Ground .................... -0.3V to +6V V+ with respect to Ground ................. -0.3V to +16.5V Wiper Current (10 sec) ...................................... +6mA Lead Soldering temperature (10 sec) .............. +300˚C POTENTIOMETER CHARACTERISTICS (Over recommended operating conditions unless otherwise stated.) Notes: 1. This parameter is tested initially and after a design or process change that affects the parameter. 2. Absolute linearity is utilized to determine actual wiper voltage versus expected voltage as determined by wiper position when used as a potentiometer. 3. Relative linearity is utilized to determine the actual change in voltage between two successive tap positions when used as a potentiometer. 4. LSB = (RHM - RLM)/127; where RHM and RLM are the highest and lowest measured values on the wiper terminal. 5. n = 1, 2, ..., 127 6. V+ @ RH; 0V @ RL; VW measured @ RW with no load. COMMENT Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions outside of those listed in the operational sections of this specification is not implied. Exposure to any absolute maximum rating for extended periods may affect device performance and reliability. Notes: 1. Latch-up protection is provided for stresses up to 100mA on address and data pins from -0.3V to VCC +0.3V. l o b m y Sr e t e m a r a Ps n o i t i d n o C t s e T s t i m i L s t i n U n i Mp y Tx a M R T O P k 0 0 1 ( e c n a t s i s e R r e t e m o i t n e t o P Ω)0 0 1k Ω R T O P k 0 5 ( e c n a t s i s e R r e t e m o i t n e t o P Ω)0 5k Ω R T O P k 0 1 ( e c n a t s i s e R r e t e m o i t n e t o P Ω)0 1k Ω R L O T e c n a r e l o T e c n a t s i s e R r e t e m o i t n e t o P + 0 2% g n i t a R r e w o PC ° 5 20 5W m I W t n e r r u C r e p i W +3A m R W e c n a t s i s e R r e p i W I W =+ V 2 1 = + V @ A m 10 70 5 1 Ω I W =+ V 8 = + V @ A m 10 1 10 0 2 Ω V M R E T R n o e g a t l o V W R , H R r o L V 6 1 o t V 8 = + V ; V 0 = D N GD N G+ VV S E Rn o i t u l o s e R 8 7 . 0% A N I L y t i r a e n i L e t u l o s b A ) 2 ( V ) l a u t c a ( ) n ( W V - ) d e t c e p x e ( ) n ( W , ) 5 () 6 ( +1B S L ) 4 ( R N I L y t i r a e n i L e v i t a l e R ) 3 ( V ) 1 + n ( W V [ - ) n ( W ] B S L + , ) 5 () 6 ( + 5 . 0B S L ) 4 ( C T T O P R R f o t n e i c i f f e o C e r u t a r e p m e T T O P ) 1 ( + 0 0 3C ° / m p p C T o i t a R t n e i c i f f e o C e r u t a r e p m e T c i r t e m o i t a R ) 1 ( 0 3C ° / m p p C H C / L C / W s e c n a t i c a p a C r e t e m o i t n e t o P ) 1 ( 5 2 / 0 1 / 0 1F p c fe s n o p s e R y c n e u q e r FR T O P k 0 5 = Ω 4 . 0z H M |
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Descripción similar - CAT5132ZI-50-GT3 |
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