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ST62T28C Datasheet(PDF) 34 Page - STMicroelectronics |
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ST62T28C Datasheet(HTML) 34 Page - STMicroelectronics |
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34 / 84 page  34/84 ST62T28C/E28C 4 ON-CHIP PERIPHERALS 4.1 I/O PORTS The MCU features Input/Output lines which may be individually programmed as any of the following input or output configurations: – Input without pull-up or interrupt – Input with pull-up and interrupt – Input with pull-up, but without interrupt – Analog input – Push-pull output – Open drain output The lines are organised as bytewise Ports. Each port is associated with 3 registers in Data space. Each bit of these registers is associated with a particular line (for instance, bits 0 of Port A Data, Direction and Option registers are associat- ed with the PA0 line of Port A). The DATA registers (DRx), are used to read the voltage level values of the lines which have been configured as inputs, or to write the logic value of the signal to be output on the lines configured as outputs. The port data registers can be read to get the effective logic levels of the pins, but they can be also written by user software, in conjunction with the related option registers, to select the dif- ferent input mode options. Single-bit operations on I/O registers are possible but care is necessary because reading in input mode is done from I/O pins while writing will direct- ly affect the Port data register causing an unde- sired change of the input configuration. The Data Direction registers (DDRx) allow the data direction (input or output) of each pin to be set. The Option registers (ORx) are used to select the different port options available both in input and in output mode. All I/O registers can be read or written to just as any other RAM location in Data space, so no extra RAM cells are needed for port data storage and manipulation. During MCU initialization, all I/O reg- isters are cleared and the input mode with pull-ups and no interrupt generation is selected for all the pins, thus avoiding pin conflicts. Figure 22. I/O Port Block Diagram VDD RESET SIN CONTROLS SOUT SHIFT REGIST ER DATA DATA DIRECTION REGISTE R REGISTE R OPTION REGISTE R INPUT /OUTPUT TO INTERRU PT VDD TO ADC VA00413 34 |
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