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ST62T53B Datasheet(PDF) 14 Page - STMicroelectronics |
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ST62T53B Datasheet(HTML) 14 Page - STMicroelectronics |
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14 / 75 page  14/75 ST62T53B/T60B/T63B ST62E60B 1.4 PROGRAMMING MODES 1.4.1 Option Byte The Option Byte allows configuration capability to the MCUs. Option byte’s content is automatically read, and the selected options enabled, when the chip reset is activated. It can only be accessed during the programming mode. This access is made either automatically (copy from a master device) or by selecting the OPTION BYTE PROGRAMMING mode of the pro- grammer. The option byte is located in a non-user map. No address has to be specified. EPROM Code Option Byte PROTECT. This bit allows the protection of the software contents against piracy. When the bit PROTECT is set high, readout of the OTP con- tents is prevented by hardware. No programming equipment is able to gain access to the user pro- gram. When this bit is low, the user program can be read. EXTCNTL. This bit selects the External STOP Mode capability. When EXTCNTL is high, pin NMI controls if the STOP mode can be accessed when the watchdog is active. In addition, PB0 is forced as open drain output. When EXTCNTL is low, the STOP instruction is processed as a WAIT as soon as the watchdog is active. PB2-3 PULL. When set this bit removes pull-up at reset on PB2-PB3 pins. When cleared PB2-PB3 pins have an internal pull-up resistor at reset. PB0-1 PULL. When set this bit removes pull-up at reset on PB0-PB1 pins. When cleared PB0-PB1 pins have an internal pull-up resistor at reset. WDACT. This bit controls the watchdog activation. When it is high, hardware activation is selected. The software activation is selected when WDACT is low. DELAY. This bit enables the selection of the delay internally generated after pin RESET is released. When DELAY is low, the delay is 2048 cycles of the oscillator, it is of 32768 cycles when DELAY is high. OSCIL. When this bit is low, the oscillator must be controlled by a quartz crystal, a ceramic resonator or an external frequency. When it is high, the oscil- lator must be controlled by an RC network, with only the resistor having to be externally provided. D0. Reserved. Must be cleared to zero. The Option byte is written during programming ei- ther by using the PC menu (PC driven Mode) or automatically (stand-alone mode) 1.4.2 Program Memory EPROM/OTP programming mode is set by a +12.5V voltage applied to the TEST/VPP pin. The programming flow of the ST62E60B/T60B and ST62T63B is described in the User Manual of the EPROM Programming Board. The MCUs can be programmed with the ST62E6xB EPROM programming tools available from SGS-THOMSON. Table 5. ST62E60B/T60B Program Memory Map Table 6. ST62T53B/T63B Program Memory Map Note: OTP/EPROM devices can be programmed with the development tools available from SGS-THOMSON (ST62E6X-EPB or ST626X-KIT). 1.4.3 EEPROM Data Memory (except ST62T53B) EEPROM data pages are supplied in the virgin state FFh. Partial or total programming of EEPROM data memory can be performed either through the appli- cation software, or through an external program- mer. Any SGS-THOMSON tool used for the pro- gram memory (OTP/EPROM) can also be used to program the EEPROM data memory. 70 PRO- TECT EXTC - NTL PB2-3 PULL PB0-1 PULL WDACT DELAY OSCIL - Device Address Description 0000h-007Fh 0080h-0F9Fh 0FA0h-0FEFh 0FF0h-0FF7h 0FF8h-0FFBh 0FFCh-0FFDh 0FFEh-0FFFh Reserved User ROM Reserved Interrupt Vectors Reserved NMI Interrupt Vector Reset Vector Device Address Description 0000h-087Fh 0880h-0F9Fh 0FA0h-0FEFh 0FF0h-0FF7h 0FF8h-0FFBh 0FFCh-0FFDh 0FFEh-0FFFh Reserved User ROM Reserved Interrupt Vectors Reserved NMI Interrupt Vector Reset Vector 14 |
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