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ST6373J5B1 Datasheet(PDF) 11 Page - STMicroelectronics |
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ST6373J5B1 Datasheet(HTML) 11 Page - STMicroelectronics |
11 / 64 page ST6373 11/64 MEMORY SPACES (Cont’d) Data ROM Addressing. All the read-only data are physically implemented in the ROM in which the Program Space is also implemented. The ROM therefore contains the program to be executed and also the constants and the look-up tables needed for the program. The locations of Data Space in which the different constants and look-up tables are addressed by the ST6 Core can be considered as being a 64-byte window through which it is pos- sible to access to the read-only data stored in the ROM. This window is located from the 40h ad- dress to the 7Fh address in the Data space and al- lows the direct reading of the bytes from the 000h address to the 03Fh address in the ROM. All the bytes of the ROM can be used to store either in- structions or read-only data. Indeed, the window can be moved by step of 64 bytes along the ROM in writing the appropriate code in the Write-only Data ROM Window register (DRWR, location C9h). The effective address of the byte to be read as a data in the ROM is obtained by the concate- nation of the 6 less significant bits of the address in the Data Space (as less significant bits) and the content of the DRWR (as most significant bits). So when addressing location 40h of data space, and 0 is loaded in the DRWR, the physical addressed location in ROM is 00h. Data ROM Window Register (DWR) Address: C9h - Write only Reset Value: XXh DWR7-DWR0. These are the Data Rom Window bits that correspond to the upper bits of data ROM program space. This register is undefined after re- set. Note: Care is required when handling the DRWR as it is write only. For this reason, it is not allowed to change the DRWR contents while executing inter- rupts drivers, as the driver cannot save and than restore its previous content. If it is impossible to avoid the writing of this register in interrupts driv- ers, an image of this register must be saved in a RAM location, and each time the program writes the DRWR it writes also the image register. The image register must be written first, so if an inter- rupt occurs between the two instructions the DRWR register is not affected. Figure 6. Data ROM Window Memory Addressing 70 DWR 7 DWR6 DWR5 DWR4 DWR3 DWR2 DWR1 DWR0 DATA ROM WINDOW REGISTER CONTENTS DATA SPACE ADDRESS 40h-7Fh IN INSTRUCTION PROGRAM SPACE ADDRESS 65 432 0 5432 10 5432 10 READ 1 6 7 8 9 10 11 01 VR01573B 12 1 0 DATA SPACE ADDRESS 59h 0 0 0 0 0 1 00 1 1 1 Example: (DWR) DWR=28h 11 0000 00 00 1 ROM ADDRESS:A19h 11 13 01 7 0 0 |
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