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STA013B Datasheet(PDF) 11 Page - STMicroelectronics |
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STA013B Datasheet(HTML) 11 Page - STMicroelectronics |
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11 / 38 page  3.4 - READ OPERATION (see Fig. 11) 3.4.1 - Current byte address read The STA013 has an internal byte address counter. Each time a byte is written or read, this counter is incremented. For the current byte address read mode, follow- ing a START condition the master sends the de- vice address with the RW bit set to 1. The STA013 acknowledges this and outputs the byte addressed by the internal byte address counter. The master does not acknowledge the received byte, but terminates the transfer with a STOP condition. 3.4.2 - Sequential address read This mode can be initiated with either a current address read or a random address read. How- ever in this case the master does acknowledge the data byte output and the STA013 continues to output the next byte in sequence. To terminate the streams of bytes the master does not acknowledge the last received byte, but terminates the transfer with a STOP condition. The output data stream is from consecutive byte addresses, with the internal byte address counter automatically incremented after one byte output. 4 - I 2C REGISTERS The following table gives a description of the MPEG Source Decoder (STA013) register list. The first column (HEX_COD) is the hexadecimal code for the sub-address. The second column (DEC_COD) is the decimal code. The third column (DESCRIPTION) is the descrip- tion of the information contained in the register. The fourth column (RESET) inidicate the reset value if any. When no reset value is specifyed, the default is "undefined". The fifth column (R/W) is the flag to distinguish register "read only" and "read and write", and the useful size of the register itself. Each register is 8 bit wide. The master shall oper- ate reading or writing on 8 bits only. I 2C REGISTERS HEX_COD DEC_COD DESCRIPTION RESET R/W $00 0 VERSION R (8) $01 1 IDENT 0xAC R (8) $05 5 PLLCTL [7:0] 0xA1 R/W (8) $06 6 PLLCTL [20:16] (MF[4:0]=M) 0x0C R/W (8) $07 7 PLLCTL [15:12] (IDF[3:0]=N) 0x00 R/W (8) $0B 11 reserved $0C 12 REQ_POL 0x01 R/W (8) $0D 13 SCLK_POL 0x04 R/W (8) $0F 15 ERROR_CODE 0x00 R (8) $10 16 SOFT_RESET 0x00 W (8) $13 19 PLAY 0x01 R/W(8) $14 20 MUTE 0x00 R/W(8) $16 22 CMD_INTERRUPT 0x00 R/W(8) $18 24 DATA_REQ_ENABLE 0x00 R/W(8) $40 64 SYNCSTATUS 0x00 R (8) $41 65 ANCCOUNT_L 0x00 R (8) $42 66 ANCCOUNT_H 0x00 R (8) STA013 - STA013B - STA013T 11/38 |
Número de pieza similar - STA013B |
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Descripción similar - STA013B |
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