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TPS62701YZF Datasheet(PDF) 4 Page - Texas Instruments |
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TPS62701YZF Datasheet(HTML) 4 Page - Texas Instruments |
4 / 25 page PIN ASSIGNMENTS A1 A2 A3 B3 C3 C2 C1 B1 CSP-8 TOP VIEW PV IN AV IN EN V CON FB AGND PGND SW A1 A2 A3 B3 C3 C2 C1 B1 CSP-8 BOTTOMVIEW FB AGND PGND SW PV IN AV IN EN V CON FUNCTIONAL BLOCK DIAGRAM SW Zero-Pole Amp. Integrator Error Amp . PWM Comp . VREF Control Stage GateDriver Anti Shoot-Through Through Current LimitComparator Current LimitComparator 2.0Mhz Oscillator Thermal Shutdown Limit HighSide Limit LowSide Sawtooth Generator FB Gain 2.5 Clamp Circuit Softstart VCON EN AVIN PVIN PGND AGND TPS62700, TPS62701 SLVS784B – DECEMBER 2007 – REVISED JUNE 2008................................................................................................................................................... www.ti.com TERMINAL FUNCTIONS TERMINAL I/O DESCRIPTION NAME NO. CSP PVIN A1 PWR VIN power supply input for the PMOSFET AVIN B1 PWR VIN analog supply input for the internal analog circuitry EN C1 I Enable input for the device. Set high for operation, low for shutdown. This pin must be terminated. VCON C2 I Voltage control input. This pin controls the output voltage of the converter. The output voltage follows VCON with a gain of 2.5 for 0.556 V ≤ VCON ≤ 1.208 V. FB C3 I Analog Feedback Input Pin for the internal regulation loop. Connect this pin directly to the output capacitor. AGND B3 I Analog GND Pin for the internal analog circuitry. PGND A3 Power GND Pin for the NMOSFET SW A2 Switch Node to the internal PMOSFET and NMOSFET. Connect the external inductor between this pin and the output capacitor. 4 Submit Documentation Feedback Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): TPS62700 TPS62701 |
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