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74ACT157MTR Datasheet(PDF) 1 Page - STMicroelectronics |
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74ACT157MTR Datasheet(HTML) 1 Page - STMicroelectronics |
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1 / 10 page  1/10 April 2001 s HIGH SPEED: tPD = 5.5 ns (TYP.) at VCC = 5V s LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C s COMPATIBLE WITH TTL OUTPUTS VIH = 2V (MIN.), VIL = 0.8V (MAX.) s 50 Ω TRANSMISSION LINE DRIVING CAPABILITY s SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24mA (MIN) s BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL s OPERATING VOLTAGE RANGE: VCC (OPR) = 4.5V to 5.5V s PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 157 s IMPROVED LATCH-UP IMMUNITY DESCRIPTION The 74ACT157 is an advanced high-speed CMOS QUAD 2-CHANNEL MULTIPLEXER fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS tecnology. It consists of four 2-input digital multiplexer with common SELECT and STROBE inputs. It is a non-inverting multiplexer. When the STROBE input is held high selection of data is inhibit and all the outputs become low. The SELECT decoding determines whether the A or B inputs get routed to their corresponding Y outputs. The device is designed to interface directly High Speed CMOS systems with TTL, NMOS and CMOS output voltage levels. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. 74ACT157 QUAD 2 CHANNEL MULTIPLEXER PIN CONNECTION AND IEC LOGIC SYMBOLS ORDER CODES PACKAGE TUBE T & R DIP 74ACT157B SOP 74ACT157M 74ACT157MTR TSSOP 74ACT157TTR TSSOP DIP SOP |
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