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74LCX74MTR Datasheet(PDF) 1 Page - STMicroelectronics |
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74LCX74MTR Datasheet(HTML) 1 Page - STMicroelectronics |
1 / 17 page July 2006 Rev 8 1/17 17 74LCX74 Low voltage CMOS dual D-Type Flip Flop with 5V tolerant inputs Features ■ 5V tolerant inputs ■ High speed: –fMAX = 150MHz (Max) at VCC = 3V ■ Power down protection on inputs and outputs ■ Symmetrical output impedance: –|IOH| = IOL = 24mA (Min) at VCC = 3V ■ PCI bus levels guaranteed at 24mA ■ Balanced propagation delays: –tPLH ≅ tPHL ■ Operating voltage range: –VCC (Opr) = 2.0V to 3.6V ■ Pin and function compatible with 74 series 74 ■ Latch-up performance exceeds 500mA (JESD 17) ■ ESD performance: – HBM > 2000V (MIL STD 883 method 3015); MM > 200V Description The 74LCX74 is a low voltage CMOS dual D-type flip flop with preset and clear non inverting fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power and high speed 3.3V applications; it can be interfaced to 5V signal environment for inputs. A signal on the D INPUT is transferred to the Q OUTPUT during the positive going transition of the clock pulse. CLR and PR are independent of the clock and accomplished by a low setting on the appropriate input. It has same speed performance at 3.3V than 5V AC/ACT family, combined with a lower power consumption. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. SO-14 TSSOP14 www.st.com Order codes Part number Package Packaging 74LCX74MTR SO-14 Tape and reel 74LCX74TTR TSSOP14 Tape and reel |
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