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74LCX652TTR Datasheet(PDF) 3 Page - STMicroelectronics

No. de pieza 74LCX652TTR
Descripción Electrónicos  LOW VOLT. CMOS OCTAL BUS TRANSCEIVER/REGISTER WITH 5 VOLT TOLERANT INPUTS AND OUTPUTS(3-STATE)
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Fabricante Electrónico  STMICROELECTRONICS [STMicroelectronics]
Página de inicio  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

74LCX652TTR Datasheet(HTML) 3 Page - STMicroelectronics

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Table 3: Truth Table
X : Don’t Care
Z : High Impedance
Qn : The data stored to the internal flip-flops by most recent low to high transition of the clock inputs
* : The data at the A and B bus will be stored to the internal flip-flops on every low to high transition of the clock inputs.
GAB GBA CAB CBA SAB SBA
A
B
FUNCTION
LH
INPUTS
INPUTS
Both the A bus and the B bus are inputs
X
X
X
X
Z
Z
The Output functions of the A and B bus are disabled
X
X
INPUTS
INPUTS
Both the A and B bus are used for inputs to the internal
flip-flops. Data at the bus will be stored on low to high
transition of the clock inputs.
LL
OUTPUTS
INPUTS
The A bus are outputs and the B bus are inputs
X*
X
X
L
LL
The data at the B bus are displayed at the A bus
HH
X*
X
L
L
L
The data at the B bus are displayed at the A bus. The
data of the B bus are stored to internal flip-flop on low
to high transition of the clock pulse
HH
X*
X
X
H
Qn
X
The data stored to the internal flip-flop are displayed at
the A bus.
X*
X
H
L
L
The data at the B bus are stored to the internal flip-flop
on low to high transition of the clock pulse. The states
of the internal flip-flops output directly to the A bus.
HH
HH
INPUTS
OUTPUTS The A bus are inputs and the B bus are outputs.
XX*
L
X
LL
The data at the A bus are displayed at the B bus
HH
X*
L
X
L
L
The data at the A bus are displayed at the B bus. The
data of the A bus are stored to the internal flip-flop on
low to high transition of the clock pulse.
HH
XX*H
X
X
Qn
The data stored to the internal flip-flops are displayed
at the B bus
X*
H
X
L
L
The data at the A bus are stored to the internal flip-flop
on low to high transition of the clock pulse. The states
of the internal flip-flops output directly to the B bus.
X*
H
X
H
H
HL
OUTPUTS OUTPUTS Both the A bus and the B bus are outputs
XXH
H
Qn
Qn
The data stored to the internal flip-flops are displayed
at the A and B bus respectively.


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