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M74HCT367TTR Datasheet(PDF) 1 Page - STMicroelectronics |
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M74HCT367TTR Datasheet(HTML) 1 Page - STMicroelectronics |
1 / 9 page 1/9 September 2001 s HIGH SPEED: tPD = 14ns (TYP.) at VCC = 4.5V s LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C s COMPATIBLE WITH TTL OUTPUTS : VIH = 2V (MIN.) VIL = 0.8V (MAX) s SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 6mA (MIN) s BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL s PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 367 DESCRIPTION The M74HCT367 is an high speed CMOS HEX BUS BUFFER 3-STATE OUTPUTS fabricated with silicon gate C2MOS technology. This device contains six buffers, four buffers are controlled by an enable input (G1) and the other two buffers are controlled by the other enable input (G2); the outputs of each buffer group are enabled when G1 and/or G2 inputs are held low, and when held high, these outputs are disabled in a high-impedance state. All inputs are equipped with protection circuits against static discharge and transient excess voltage. M74HCT367 HEX BUS BUFFER WITH 3 STATE OUTPUT NON INVERTING PIN CONNECTION AND IEC LOGIC SYMBOLS ORDER CODES PACKAGE TUBE T & R DIP M74HCT367B1R SOP M74HCT367M1R M74HCT367RM13TR TSSOP M74HCT367TTR TSSOP DIP SOP |
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