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74VHCT139A Datasheet(PDF) 1 Page - STMicroelectronics

No. de pieza 74VHCT139A
Descripción Electrónicos  DUAL 2 TO 4 DECODER/DEMULTIPLEXER
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Fabricante Electrónico  STMICROELECTRONICS [STMicroelectronics]
Página de inicio  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

74VHCT139A Datasheet(HTML) 1 Page - STMicroelectronics

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December 2004
s
HIGH SPEED: tPD = 5 ns (TYP.) at VCC = 5V
s
LOW POWER DISSIPATION:
ICC = 2 µA (MAX.) at TA=25°C
s
COMPATIBLE WITH TTL OUTPUTS:
VIH = 2V (MIN.), VIL = 0.8V (MAX)
s
POWER DOWN PROTECTION ON INPUTS
& OUTPUTS
s
SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 8 mA (MIN)
s
BALANCED PROPAGATION DELAYS:
tPLH tPHL
s
OPERATING VOLTAGE RANGE:
VCC(OPR) = 4.5V to 5.5V
s
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 139
s
IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The 74VHCT139A is an advanced high-speed
CMOS
DUAL
2
TO
4
LINE
DECODER/
DEMULTIPLEXER fabricated with sub-micron
silicon gate and double-layer metal wiring C2MOS
technology.
The active low enable input can be used for gating
or as a data input for demultiplexing applications.
When the enable input is held high, all four outputs
are high independently of the other inputs.
Power down protection is provided on all inputs
and outputs and 0 to 7V can be accepted on
inputs with no regard to the supply voltage. This
device can be used to interface 5V to 3V since all
inputs are equipped with TTL threshold.
All
inputs
and
outputs
are
equipped
with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
74VHCT139A
DUAL 2 TO 4 DECODER/DEMULTIPLEXER
Figure 1: Pin Connection And IEC Logic Symbols
Table 1: Order Codes
PACKAGE
T & R
SOP
74VHCT139AMTR
TSSOP
74VHCT139ATTR
TSSOP
SOP
Rev. 3


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