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HCF4089BEY Datasheet(PDF) 6 Page - STMicroelectronics |
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HCF4089BEY Datasheet(HTML) 6 Page - STMicroelectronics |
6 / 11 page HCF4089B 6/11 (*) Typical temperature coefficient for all VDD value is 0.3 %/°C. tPHL tPLH Propagation Delay Time CLEAR to OUT 5 380 760 ns 10 175 350 15 130 260 tPHL tPLH Propagation Delay Time CLOCK to "9" or "15" OUT 5 300 600 ns 10 125 250 15 90 180 tPHL tPLH Propagation Delay Time CASCADE to OUT 590 180 ns 10 45 90 15 35 70 tPHL tPLH Propagation Delay Time INHIBIT IN to INHIBIT OUT 5 160 320 ns 10 75 150 15 55 110 tPHL tPLH Propagation Delay Time SET to OUT 5 330 660 ns 10 150 300 15 110 220 tTHL tTLH Transition Time 5 100 200 ns 10 50 100 15 40 80 fCL Maximum Clock Frequency 5 1.2 2.4 MHz 10 2.5 5 15 3.5 7 tW Clock Pulse Width 5 330 165 ns 10 170 85 15 100 50 tr, tf Clock Rise or Fall Time 5 15 µs 10 15 15 15 tW SET or CLEAR pulse Width 5 160 80 ns 10 90 45 15 60 30 tsetup INHIBIT Input Set-Up Time, High Level to Low Level 5 100 50 ns 10 40 20 15 20 10 tR INHIBIT Input Removal Time 5 240 120 ns 10 130 65 15 110 55 tR Minimum SET Removal Time 5 150 75 ns 10 80 40 15 50 25 tR CLEAR Removal Time 5 60 30 ns 10 40 20 15 30 15 Symbol Parameter Test Condition Value (*) Unit VDD (V) Min. Typ. Max. |
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