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ST7P19BY1B6TR Datasheet(PDF) 97 Page - STMicroelectronics |
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ST7P19BY1B6TR Datasheet(HTML) 97 Page - STMicroelectronics |
97 / 159 page ST7LITE1xB 97/159 10-BIT A/D CONVERTER (ADC) (Cont’d) 11.5.3.2 Input Voltage Amplifier The input voltage can be amplified by a factor of 8 by enabling the AMPSEL bit in the ADCDRL regis- ter. When the amplifier is enabled, the input range is 0V to VDD/8. For example, if VDD = 5V, then the ADC can con- vert voltages in the range 0V to 430mV with an ideal resolution of 0.6mV (equivalent to 13-bit res- olution with reference to a VSS to VDD range). For more details, refer to the Electrical character- istics section. Note: The amplifier is switched on by the ADON bit in the ADCCSR register, so no additional start- up time is required when the amplifier is selected by the AMPSEL bit. 11.5.3.3 Digital A/D Conversion Result The conversion is monotonic, meaning that the re- sult never decreases if the analog input does not and never increases if the analog input does not. If the input voltage (VAIN) is greater than VDDA (high-level voltage reference) then the conversion result is FFh in the ADCDRH register and 03h in the ADCDRL register (without overflow indication). If the input voltage (VAIN) is lower than VSSA (low- level voltage reference) then the conversion result in the ADCDRH and ADCDRL registers is 00 00h. The A/D converter is linear and the digital result of the conversion is stored in the ADCDRH and AD- CDRL registers. The accuracy of the conversion is described in the Electrical Characteristics Section. RAIN is the maximum recommended impedance for an analog input signal. If the impedance is too high, this will result in a loss of accuracy due to leakage and sampling not being completed in the alloted time. 11.5.3.4 A/D Conversion The analog input ports must be configured as in- put, no pull-up, no interrupt. Refer to the «I/O ports» chapter. Using these pins as analog inputs does not affect the ability of the port to be read as a logic input. In the ADCCSR register: – Select the CH[2:0] bits to assign the analog channel to convert. ADC Conversion mode In the ADCCSR register: Set the ADON bit to enable the A/D converter and to start the conversion. From this time on, the ADC performs a continuous conversion of the selected channel. When a conversion is complete: – The EOC bit is set by hardware. – The result is in the ADCDR registers. A read to the ADCDRH or a write to any bit of the ADCCSR register resets the EOC bit. To read the 10 bits, perform the following steps: 1. Poll the EOC bit 2. Read ADCDRL 3. Read ADCDRH. This clears EOC automati- cally. To read only 8 bits, perform the following steps: 1. Poll EOC bit 2. Read ADCDRH. This clears EOC automati- cally. 11.5.3.5 Changing the conversion channel The application can change channels during con- version. When software modifies the CH[2:0] bits in the ADCCSR register, the current conversion is stopped, the EOC bit is cleared, and the A/D con- verter starts converting the newly selected chan- nel. 11.5.4 Low Power Modes Note: The A/D converter may be disabled by re- setting the ADON bit. This feature allows reduced power consumption when no conversion is need- ed and between single shot conversions. 11.5.5 Interrupts None. Mode Description WAIT No effect on A/D Converter HALT A/D Converter disabled. After wakeup from Halt mode, the A/D Con- verter requires a stabilization time tSTAB (see Electrical Characteristics) before accurate conversions can be performed. 1 |
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