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ST62T52CMA Datasheet(PDF) 54 Page - STMicroelectronics |
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ST62T52CMA Datasheet(HTML) 54 Page - STMicroelectronics |
54 / 72 page 54/72 ST62T52CM-Auto ST62T62CM-Auto INSTRUCTION SET (Cont’d) Conditional Branch. The branch instructions achieve a branch in the program when the select- ed condition is met. Bit Manipulation Instructions. These instruc- tions can handle any bit in data space memory. One group either sets or clears. The other group (see Conditional Branch) performs the bit test branch operations. Control Instructions. The control instructions control the MCU operations during program exe- cution. Jump and Call. These two instructions are used to perform long (12-bit) jumps or subroutines call inside the whole program space. Table 18. Conditional Branch Instructions Notes : b. 3-bit address rr. Data space register e. 5 bit signed displacement in the range -15 to +16<F128M> ∆ . Affected. The tested bit is shifted into carry. ee. 8 bit signed displacement in the range -126 to +129 * . Not Affected Table 19. Bit Manipulation Instructions Notes: b. 3-bit address; * . Not<M> Affected rr. Data space register; Table 20. Control Instructions Notes: 1. This instruction is deactivated<N>and a WAIT is automatically executed instead of a STOP if the watchdog function is selected. ∆ . Affected *. Not Affected Table 21. Jump & Call Instructions Notes: abc. 12-bit address; * . Not Affected Instruction Branch If Bytes Cycles Flags Z C JRC e C = 1 1 2 * * JRNC e C = 0 1 2 * * JRZ e Z = 1 1 2 * * JRNZ e Z = 0 1 2 * * JRR b, rr, ee Bit = 0 3 5 * ∆ JRS b, rr, ee Bit = 1 3 5 * ∆ Instruction Addressing Mode Bytes Cycles Flags Z C SET b,rr Bit Direct 2 4 * * RES b,rr Bit Direct 2 4 * * Instruction Addressing Mode Bytes Cycles Flags Z C NOP Inherent 1 2 * * RET Inherent 1 2 * * RETI Inherent 1 2 ∆ ∆ STOP (1) Inherent 1 2 * * WAIT Inherent 1 2 * * Instruction Addressing Mode Bytes Cycles Flags Z C CALL abc Extended 2 4 * * JP abc Extended 2 4 * * |
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