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ST7P10BF1M6TR Datasheet(PDF) 34 Page - STMicroelectronics |
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ST7P10BF1M6TR Datasheet(HTML) 34 Page - STMicroelectronics |
34 / 159 page ST7LITE1xB 34/159 SYSTEM INTEGRITY MANAGEMENT (Cont’d) 7.6.3 Low Power Modes 7.6.3.1 Interrupts The AVD interrupt event generates an interrupt if the corresponding Enable Control Bit (AVDIE) is set and the interrupt mask in the CC register is re- set (RIM instruction). Mode Description WAIT No effect on SI. AVD interrupts cause the device to exit from Wait mode. HALT The SICSR register is frozen. The AVD remains active. Interrupt Event Event Flag Enable Control Bit Exit from Wait Exit from Halt AVD event AVDF AVDIE Yes No 1 |
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