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ST7P10BY0M3TR Datasheet(Hoja de datos) 4 Page - STMicroelectronics

No. de Pieza. ST7P10BY0M3TR
Descripción  8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, 5 TIMERS, SPI
Descarga  159 Pages
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Fabricante  STMICROELECTRONICS [STMicroelectronics]
Página de inicio  http://www.st.com
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 4 page
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ST7LITE1xB
4/159
1 INTRODUCTION
The ST7LITE1xB is a member of the ST7 micro-
controller family. All ST7 devices are based on a
common industry-standard 8-bit core, featuring an
enhanced instruction set.
The ST7LITE1xB features FLASH memory with
byte-by-byte In-Circuit Programming (ICP) and In-
Application Programming (IAP) capability.
Under software control, the ST7LITE1xB device
can be placed in WAIT, SLOW, or HALT mode, re-
ducing power consumption when the application is
in idle or standby state.
The enhanced instruction set and addressing
modes of the ST7 offer both power and flexibility to
software developers, enabling the design of highly
efficient and compact application code. In addition
to standard 8-bit data management, all ST7 micro-
controllers feature true bit manipulation, 8x8 un-
signed multiplication and indirect addressing
modes.
For easy reference, all parametric data are located
in section 13 on page 110. The ST7LITE1xB fea-
tures an on-chip Debug Module (DM) to support
In-Circuit Debugging (ICD). For a description of
the DM registers, refer to the ST7 ICC Protocol
Reference Manual.
Figure 1. General Block Diagram
8-BIT CORE
ALU
OSC1
OSC2
RESET
PORT A
Internal
CLOCK
CONTROL
RAM
(256 Bytes)
PA7:0
(8 bits)
VSS
VDD
POWER
SUPPLY
PROGRAM
(up to 4K Bytes)
LVD, AVD
MEMORY
PLL x 8
Ext.
1MHz
PLL
Int.
1MHz
8-Bit
LITE TIMER 2
PORT B
SPI
PB6:0
(7 bits)
DATA EEPROM
(128 Bytes)
1% RC
OSC
to
16MHz
ADC
+ OpAmp
12-Bit
Auto-Reload
TIMER 2
CLKIN
/ 2
or PLL X4
8MHz -> 32MHz
WATCHDOG
Debug Module
Programmable
Internal Reference
Comparator
PORT C
PC1:0
(2 bits)
1




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