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ST7P15BY1M3TR Datasheet(PDF) 100 Page - STMicroelectronics |
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ST7P15BY1M3TR Datasheet(HTML) 100 Page - STMicroelectronics |
100 / 159 page ST7LITE1xB 100/159 11.6 ANALOG COMPARATOR (CMP) 11.6.1 Introduction The CMP block consists of an analog comparator and an internal voltage reference. The voltage ref- erence can be external or internal, selectable un- der program control. The comparator input pins COMPIN+ and COMPIN- are also connected to the A/D converter (ADC). 11.6.2 Main Features 11.6.2.1 On-chip Analog Comparator The analog comparator compares the voltage at two input pins COMPIN+ and COMPIN- which are connected to VP and VN at the comparator input. When the analog input at COMPIN+ is less than the analog input at COMPIN-, the output of the comparator is 0. When the analog input at COMPIN+ is greater than the analog input at COMPIN-, the output of the comparator is 1. The result of the comparison as 0 or 1 at COM- POUT is shown in Figure 62 on page 101. Note: To obtain a stable result, the comparator requires a stabilization time of 500ns. Please refer to sec- tion 13.12 on page 143. Table 19. Comparison Result 11.6.2.2 Programmable External/Internal Voltage Reference The voltage reference module can be configured to connect the comparator pin COMPIN- to one of the following: - Fixed internal voltage bandgap - Programmable internal reference voltage - External voltage reference 1) Fixed Internal Voltage Bandgap The voltage reference module can generate a fixed voltage reference of 1.2V on the VN input. This is done by setting the VCBGR bit in the VREFCR register. 2) Programmable Internal Voltage Reference The internal voltage reference module can pro- vide 16 distinct internally generated voltage lev- els from 3.2V to 0.2V each at a step of 0.2V on comparator pin VN. The voltage is selected through the VR[3:0] bits in the VREFCR regis- ter. 3) External Reference Voltage If a reference voltage other than that generated by the internal voltage reference module is required, COMPIN- can be connected to an external voltage source. This configuration can be selected by setting the VCEXT bit in the VREFCR register. 11.6.3 Functional Description To make an analog comparison, the CMPON bit in the CMPCR register must be set to power-on the comparator and internal voltage reference mod- ule. The VP comparator input is mapped on PB0 and is also connected to ADC channel 0. The VN comparator input is mapped on PB4 for external voltage input, and is also connected to ADC channel 4. The internal voltage reference can provide a range of different voltages to the comparator VN input, selected by several bits in the VREFCR register, as described in Table 20. To select pins PB0 and PB4 for A/D conversion, (default reset state), channel 0 or 4 must be select- ed through the channel selection bits in the ADCC- SR register (refer to Section 11.5.6) The comparator output is connected to pin PA7 when the COUT bit in the CMPCR register is set. The comparator output is also connected internally to the break function of the 12-bit Autoreload Tim- er (refer to Section 11.2) When the Comparator is OFF, the output value of comparator is ‘1’. Important note: To avoid spurious toggling of the output of the comparator due to noise on the volt- age reference, it is recommended to enable the hysteresis through the CHYST bit in the CMPCR register. CINV Input Conditions COMPOUT 0 VP > VN 1 VN > VP 0 1 VP > VN 0 VN > VP 1 |
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