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FAN5355UC02X Datasheet(PDF) 8 Page - Fairchild Semiconductor |
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FAN5355UC02X Datasheet(HTML) 8 Page - Fairchild Semiconductor |
8 / 27 page © 2008 Fairchild Semiconductor Corporation 8 www.fairchildsemi.com FAN5355 • Rev. 1.0.4 I2C Timing Specifications Guaranteed by design. Symbol Parameter Conditions Min. Typ. Max. Units Standard mode 100 kHz Fast mode 400 kHz High-Speed mode, CB < 100pF 3400 kHz fSCL SCL Clock Frequency High-Speed mode, CB < 400pF 1700 kHz Standard mode 4.7 μs tBUF Bus-free Time between STOP and START Conditions Fast mode 1.3 μs Standard mode 4 μs Fast mode 600 ns tHD;STA START or Repeated START Hold Time High-Speed mode 160 ns Standard mode 4.7 μs Fast mode 1.3 ns High-Speed mode, CB < 100pF 160 ns tLOW SCL LOW Period High-Speed mode, CB < 400pF 320 ns Standard mode 4 μs Fast mode 600 ns High-Speed mode, CB < 100pF 60 ns tHIGH SCL HIGH Period High-Speed mode, CB < 400pF 120 ns Standard mode 4.7 μs Fast mode 600 ns tSU;STA Repeated START Setup Time High-Speed mode 160 ns Standard mode 250 ns Fast mode 100 ns tSU;DAT Data Setup Time High-Speed mode 10 ns Standard mode 0 3.45 μs Fast mode 0 900 ns High-Speed mode, CB < 100pF 0 70 ns tHD;DAT Data Hold Time (9) High-Speed mode, CB < 400pF 0 150 ns Standard mode 20+0.1CB 1000 ns Fast mode 20+0.1CB 300 ns High-Speed mode, CB < 100pF 10 80 ns tRCL SCL Rise Time High-Speed mode, CB < 400pF 20 160 ns Standard mode 20+0.1CB 300 ns Fast mode 20+0.1CB 300 ns High-Speed mode, CB < 100pF 10 40 ns tFCL SCL Fall Time High-Speed mode, CB < 400pF 20 80 ns Standard mode 20+0.1CB 1000 ns Fast mode 20+0.1CB 300 ns High-Speed mode, CB < 100pF 10 80 ns tRDA tRCL1 SDA Rise Time Rise Time of SCL After a Repeated START Condition and After ACK Bit High-Speed mode, CB < 400pF 20 160 ns Standard mode 20+0.1CB 300 ns Fast mode 20+0.1CB 300 ns High-Speed mode, CB < 100pF 10 80 ns tFDA SDA Fall Time High-Speed mode, CB < 400pF 20 160 ns Standard mode 4 μs Fast mode 600 ns tSU;STO Stop Condition Setup Time High-Speed mode 160 ns CB Capacitive Load for SDA and SCL 400 pF |
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