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STPCC0366BTC3 Datasheet(PDF) 2 Page - STMicroelectronics

No. de pieza STPCC0366BTC3
Descripción Electrónicos  PC Compatible Embeded Microprocessor
Download  51 Pages
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Fabricante Electrónico  STMICROELECTRONICS [STMicroelectronics]
Página de inicio  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STPCC0366BTC3 Datasheet(HTML) 2 Page - STMicroelectronics

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STPC CONSUMER-S
2/51
Release B
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
s
X86 Processor core
s
Fully static 32-bit 5-stage pipeline, x86
processor fully PC compatible.
s
Can access up to 4GB of external memory.
s
8Kbyte unified instruction and data cache
with write back and write through capability.
s
Parallel processing integral floating point unit,
with automatic power down.
s
Fully static design for dynamic clock control.
s
Low power and system management modes.
s
SDRAM Controller
s
64-bit data bus.
s
Up to 66MHz SDRAM clock speed.
s
Integrated system memory, graphic frame
memory and video frame memory.
s
Supports 2MB up to 128 MB memory.
s
Supports 8MB, 16M, and 32MB DIMMs.
s
Supports buffered, non buffered, and
registered DIMMs
s
4-line write buffers for CPU to DRAM and PCI
to DRAM cycles.
s
4-line read prefetch buffers for PCI masters.
s
Programmable latency
s
Programmable timing for DRAM parameters.
s
Supports -8, -10, -12, -13, -15 memory parts
s
Supports 1MB up to 8MB memory hole.
s
32-bit accesses not supported.
s
Autoprecharge not supported.
s
Power down not supported.
s
FPM and EDO not supported.
s
Graphics Controller
s
64-bit windows accelerator.
s
Compatibility to VGA & SVGA standards.
s
Hardware acceleration for text, bitblts,
transparent blts and fills.
s
Up to 64 x 64 bit graphics hardware cursor.
s
Up to 4MB long linear frame buffer.
s
8-, 16-, and 24-bit pixels.
s
CRT Controller
s
Integrated 135MHz triple RAMDAC allowing
for 1024 x 768 x 75Hz display.
s
8-, 16-, 24-bit pixels.
s
Interlaced or non-interlaced output.
s
Video Input port
s
Accepts video inputs in CCIR 601 mode.
s
Optional 2:1 decimator
s
Stores captured video in off setting area of
the onboard frame buffer.
s
Video pass through to the onchip PAL/NTSC
encoder for full screen video images.
s
HSYNC and B/T generation or lock onto
external video timing source.
s
Video Pipeline
s
Two-tap interpolative horizontal filter.
s
Two-tap interpolative vertical filter.
s
Color space conversion.
s
Programmable window size.
s
Chroma and color keying for integrated video
overlay.
s
TV Output
s
Programmable two tap filter with gamma
correction or three tap flicker filter.
s
Progressive to interlaced scan converter.
s
NTSC-M, PAL-M,PAL-B,D,G,H,I,PAL-N easy
programmable video outputs.
s
CCIR601 encoding with programmable color
subcarrier frequencies.
s
Line skip/insert capability
s
Interlaced or non-interlaced operation mode.
s
625 lines/50Hz or 525 lines/60Hz 8 bit
multiplexed CB-Y-CR digital input.
s
CVBS and R,G,B simultaneous analog
outputs through 10-bit DACs.
s
Cross color reduction by specific trap filtering
on luma within CVBS flow.
s
Power down mode available on each DAC.


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