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LC89058W Datasheet(PDF) 6 Page - Sanyo Semicon Device |
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LC89058W Datasheet(HTML) 6 Page - Sanyo Semicon Device |
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6 / 64 page  LC89058W-E No.A1056-6/64 7 Common and Different Points between LC89057W-VF4A-E and LC89058W-E 7.1 Common Features Table 7.1: Common of LC89057W-VF4A-E and LC89058W-E functions (Hardware/Software Compatibility) Item LC89057W-VF4A-E LC89058W-E Package SQFP48(9x9) ← Supply voltage 3.3V single source ← DIR reception range 32kHz to 192kHz ← Oscillation amplifier input frequency 12.288MHz/24.576MHz ← 2-system-clock pin output RMCK, RBCK, RLRCK, SBCK, SLRCK ← SBCK: 16fs, SLRCK: 1/4 output added S/PDIF inputs 7 maximum (1 coaxial, 6 optical) ← Serial data input SDIN ← Non-PCM flag output AUDIO ← Emphasis information output EMPHA (consumer and professional) ← MOUT (consumer only) DTS-CD/LD detection function 14-bit format detection supported ← General-purpose I/O 4 bits ← Chip address setting 4 addresses maximum (master/salve supported) ← Mode setting external resistor 4 resistors used ← Microcontroller interface CCB (SANYO-proprietary IF) ← Register configuration 4 command address bits, 8 data bits ← 7.2 Removed Functions Table 7.2: Differences between LC89057W-VF4A-E and LC89058W-E (Removed Functions) Item LC89057W-VF4A-E LC89058W-E Function Modulation and demodulation Modulation removed (demodulation only) S/PDIF unlock path switching Yes Removed External clock synchronization mode Yes Removed R and S system clock synchronization Asynchronous system Synchronization clock (SELMTD, RCKSEL removed) Data output format 16, 20, 24 bits/left-justified/right-justified MSB, I 2S Right-justified removed (left-justified MSB, I 2S only) C, V, U pin output Yes Removed Input fs computed output 16kHz to 192kHz 32kHz to 192kHz (fs < 32kHz, removed) Microcontroller interrupt signal Yes (Low pulse, Low level output) Pulse output mode removed (level output only) 7.3 Added or Modified Functions Table 7.3: Differences between LC89057W-VF4A-E and LC89058W-E (Added or Modified Functions) Item LC89057W-VF4A-E LC89058W-E Page Oscillation amplifier initial setting Suspended while PLL is locked Permanent operation 19 PLL clock output 256fs or 512fs 512fs 20-26 Master clock output Multiple of input fs is output Multiple of input fs on each band is output 22 Clock output when XIN source No limitation RBCK and SBCK must 1/2 or less of RMCK 23 Clock switching Clock count is preserved (to maintain continuity) Switched during the CKST pulse output 25 RMCK and CKST polarity Polarity cannot be switched Polarity can be switched 23, 25 S/PDIF reception limitation Reflected only to error flag. Reflected to both error flag and clock output 26 S/PDIF input detection range 32kHz to 96kHz (XIN=24.57M/12.28MHz) 32kHz to 192kHz (XIN=24.576MHz only) 27 Input fs value monitor output Microcontroller interface output only Microcontroller interface and pin outputs 32 General-purpose I/O input pin No timing control Polling supported (with interrupt) 36 General-purpose I/O input/output pin Parallel I/O function only Internal selector input also supported. 37 |
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Descripción similar - LC89058W |
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