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AD5398A-WAFER Datasheet(PDF) 11 Page - Analog Devices |
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AD5398A-WAFER Datasheet(HTML) 11 Page - Analog Devices |
11 / 16 page AD5398A Rev. 0 | Page 11 of 16 DATA FORMAT Data is written to the AD5398A high byte first, MSB first, and is shifted into the 16-bit input register. After all data is shifted in, data from the input register is transferred to the DAC register. Because the DAC requires only 10 bits of data, not all bits of the input register data are used. The MSB is reserved for an active- high, software-controlled, power-down function. The data format is shown in Table 6. When referring to this table, note that Bit 14 is unused; Bit 13 to Bit 4 correspond to the DAC data bits, D9 to D0; and Bit 3 to Bit 0 are unused. During a read operation, data is read in the same bit order. PD X D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 X X X X 00 SCL SDA START BY MASTER ACK BY AD5398A 11 91 ACK BY AD5398A ACK BY AD5398A STOP BY MASTER FRAME 3 LEAST SIGNIFICANT DATA BYTE FRAME 2 MOST SIGNIFICANT DATA BYTE FRAME 1 SERIAL BUS ADDRESS BYTE 01 1 X X R/W 9 Figure 18. Write Operation PD X D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 X X X X 00 SCL SDA START BY MASTER ACK BY AD5398A 11 91 ACK BY AD5398A ACK BY AD5398A STOP BY MASTER FRAME 3 LEAST SIGNIFICANT DATA BYTE FRAME 2 MOST SIGNIFICANT DATA BYTE FRAME 1 SERIAL BUS ADDRESS BYTE 01 1 X X R/W 9 Figure 19. Read Operation Table 6. Data Format Serial Data- Words High Byte Low Byte Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Serial Data Bits SD7 SD6 SD5 SD4 SD3 SD2 SD1 SD0 SD7 SD6 SD5 SD4 SD3 SD2 SD1 SD0 Input Register R15 R14 R13 R12 R11 R10 R9 R8 R7 R6 R5 R4 R3 R2 R1 R0 Function1 PD X D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 X X X X 1 PD = soft power-down; X = unused/don’t care; and D7 to D0 = DAC data. |
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