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ADA4062-2BRZ-RL Datasheet(PDF) 10 Page - Analog Devices |
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ADA4062-2BRZ-RL Datasheet(HTML) 10 Page - Analog Devices |
10 / 20 page ADA4062-2 Rev. 0 | Page 10 of 20 0 2 4 –20 –15 –10 –5 0 INPUT OUTPUT VSY = ±15V TIME (2µs/DIV) Figure 33. Negative Overload Recovery –5 0 5 10 15 –2 0 2 INPUT OUTPUT VSY = ±15V TIME (2µs/DIV) Figure 34. Positive Overload Recovery TIME (1µs/DIV) VSY = ±15V +10mV IDEAL STEP FUNCTION OF 10V –10mV 0V INPUT OUTPUT ERROR BAND Figure 35. Positive Settling Time to 0.01% –6 –4 –2 0 0 4 2 INPUT OUTPUT VSY = ±5V TIME (2µs/DIV) Figure 36. Negative Overload Recovery –2 0 2 4 2 0 –2 INPUT OUTPUT VSY = ±5V TIME (2µs/DIV) Figure 37. Positive Overload Recovery TIME (2µs/DIV) VSY = ±5V +2mV –2mV 0V INPUT OUTPUT ERROR BAND Figure 38. Positive Settling Time to 0.01% |
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