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TSA1002IF Datasheet(PDF) 2 Page - STMicroelectronics |
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TSA1002IF Datasheet(HTML) 2 Page - STMicroelectronics |
2 / 19 page TSA1002 2/19 ABSOLUTE MAXIMUM RATINGS OPERATING CONDITIONS BLOCK DIAGRAM Symbol Parameter Values Unit AVCC Analog Supply voltage 1) 0 to 3.3 V DVCC Digital Supply voltage 1) 0 to 3.3 V VCCB Digital buffer Supply voltage 1) 0 to 3.3 V IDout Digital output current -100 to 100 mA Tstg Storage temperature +150 °C ESD Electrical Static Discharge - HBM - CDM-JEDEC Standard 2 1.5 KV 1) All voltages values, except differential voltage, are with respect to network ground terminal. The magnitude of input and output voltages must never exceed -0.3V or VCC+0V Symbol Parameter Test conditions Min Typ Max Unit AVCC Analog Supply voltage 2.25 2.5 2.7 V DVCC Digital Supply voltage 2.25 2.5 2.7 V VCCB Digital buffer Supply voltage 2.25 2.5 2.7 V VREFP Forced top reference voltage 1.16 - AVCC V VREFM Forced bottom reference voltage 0 0 0.5 stage stage stage 1 2 n Reference Timing circuit Sequencer-phase shifting Digital data correction Buffers IPOL VREFM VREFP CLK +2.5V VIN VINB DFSB OEB DR DO TO D9 OR INCM GND GNDA |
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