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SMJ320CC6713BGDPS20EP Datasheet(PDF) 72 Page - Texas Instruments

No. de pieza SMJ320CC6713BGDPS20EP
Descripción Electrónicos  FLOATING-POINT DIGITAL SIGNAL PROCESSORS
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SMJ320CC6713BGDPS20EP Datasheet(HTML) 72 Page - Texas Instruments

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9.4
Supported Bit Stream Formats for TDM and Burst Transfer Modes
9.5
Digital Audio Interface Transmitter (DIT) Transfer Mode (Transmitter Only)
SM320C6713-EP
SM320C6713B-EP
FLOATING-POINT DIGITAL SIGNAL PROCESSORS
SGUS049H – AUGUST 2003 – REVISED SEPTEMBER 2008
www.ti.com
The serial data pins support a wide variety of formats. In the TDM and burst synchronous modes, the data
may be transmitted/received with the following options:
• Time slots per frame: 1 (burst/data driven), or 2,3...32 (TDM/time driven)
• Time slot size: 8, 12, 16, 20, 24, 28, 32 bits per time slot
• Data size: 8, 12, 16, 20, 24, 28, 32 bits (must be less than or equal to time slot)
• Data alignment within time slot: left or right justified
• Bit order: MSB or LSB first
• Unused bits in time slot: Padded with 0, 1 or extended with value of another bit
• Time slot delay from frame sync: 0-, 1-, or 2-bit delay
The data format can be programmed independently for transmit and receive, and for McASP0 versus
McASP1. In addition, the McASP can automatically realign the data as processed natively by the DSP
(any format on a nibble boundary) adjusting the data in hardware to any of the supported serial bit stream
formats (TDM, burst, and DIT modes). This adjustment reduces the amount of bit manipulation that the
DSP must perform and simplifies software architecture.
The McASP transmit section may also be configured in DIT mode where it outputs data formatted for
transmission over an S/PDIF, AES-3, IEC-60958, or CP-430 standard link. These standards encode the
serial data such that the equivalent of clock and frame sync are embedded within the data stream. DIT
transfer mode is used as an interconnect between audio components and can transfer multichannel digital
audio data over a single optical or coaxial cable.
From an internal DSP standpoint, the McASP operation in DIT transfer mode is similar to the two-time-slot
TDM mode, but the data transmitted is output as a bi-phase mark encoded bit stream with preamble,
channel status, user data, validity, and parity automatically stuffed into the bit stream by the McASP
module. The McASP includes separate validity bits for even/odd subframes and two 384-bit register file
modules to hold channel status and user data bits.
DIT mode requires (at a minimum):
• One serial data pin (if the AUXCLK is used as the reference (see Figure 8-1)
OR
• One serial data pin plus either the AHCLKX or ACLKX pin (if an external clock is needed)
If additional serial data pins are used, each McASP may be used to transmit multiple encoded bit streams
(one per pin). However, the bit streams will all be synchronized to the same clock and the user data,
channel status, and validity information carried by each bit stream will be the same for all bit streams
transmitted by the same McASP module.
The McASP can also automatically realign the data as processed by the DSP (any format on a nibble
boundary) in DIT mode; reducing the amount of bit manipulation that the DSP must perform and
simplifying software architecture.
MULTICHANNEL AUDIO SERIAL PORT (McASP) PERIPHERALS
72
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