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TELCOM SEMICONDUCTOR, INC.

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Peak Current Limit Setup

Resistors R1 and R2 at the CURRENT LIMIT input (pin

1) set the peak current limit (Figure 1). The potential at pin

1 is easily calculated:

R2

R1 + R2

R1 should be selected first. The shutdown circuit fea-

for currents greater than 140

µA.

The error amplifier output voltage is clamped from

going above V1 through the limit buffer amplifier. Peak

current is sensed by RS and amplified by the current

amplifier which has a fixed gain of 3.

the PWM comparator noninverting input to exceed V1, the

potential at the inverting input. Once the comparator trip

point is exceeded, both outputs are disabled.

V1 – 0.65V

3 (RS)

where:

3 = Gain of current-sense amplifier

0.65V = Current limit offset

Both driver OUTPUTs (pins 11 and 14) are OFF (LOW)

when the peak current limit is exceeded. When the sensed

Output Shutdown

The outputs can be turned OFF quickly through the

SHUTDOWN input (pin 16). A signal greater than 360 mV

at pin 16 forces the shutdown comparator output HIGH.

The PWM latch is held set, disabling the outputs.

positive feedback through the lock-up amplifier and Q1

keeps the inverting PWM comparator inverting input below

0.65V. Q3 remains ON even after the shutdown input

signal is removed. This is because the lock-up amplifier is

in latched mode driving Q3 ON. This state can be cleared

only through a power-up cycle. Outputs will be disabled

whenever the potential at pin 1 is below 0.65V.

The shutdown terminal gives a fast, direct way to dis-

able the PWM controller output transistors. System protec-

tion and remote shutdown applications are possible.

R2

R1 + R2

The input pulse to pin 16 should be at least 100nsec

wide and have an amplitude of at least 1V in order to get the

minimum propagation delay from input to output. If these

parameters are met, the delay should be less than 400nsec

at 25

°C; however, the delay time will increase as the device

temperature rises.

Soft Restart From Shutdown

A soft restart can be programmed if nonlatched shut-

down operation is used.

A capacitor at pin 1 will cause a gradual increase in

potential toward V1. When the voltage at pin 1 reaches

0.75V, the PWM latch set input is removed and the circuit

establishes a regulated output voltage. The soft-start opera-

tion forces the PWM output drivers to initially operate with

minimum duty cycle and low peak currents.

Even if a soft start is not required, it is necessary to

is greater than 140

µA. This capacitor will prevent "noise

triggering" of the latch, yet minimize the soft-start effect.

Soft-Start Power-Up

During power-up, a capacitor at R1, R2 initiates a soft-

start cycle. As the input voltage (pin 15) exceeds the

under-voltage lockout potential (7V), Q4 is turned OFF,

ending undervoltage lockout. Whenever the PWM com-

parator inverting input is below 0.65V, both outputs are

disabled.

When the undervoltage lockout start threshold is ex-

ceeded, the capacitor begins to charge. The PWM duty

cycle increases until the operating output voltage is reached.

Soft-start operation forces the PWM output drivers to initially

operate with minimum duty cycle and low peak current.

Current-Sense Amplifier

The current-sense amplifier operates at a fixed gain of

Resistive-sensing methods are shown in Figure 2. In

Figure 2(A), a simple RC filter limits transient voltage spikes

at pin 4, caused by external output transistor-collector

capacitance. Transformer coupling (Figure 3) offers isola-

tion and better power efficiency, but cost and complexity

increase.

In order to minimize the propagation delay from the input

to the current amplifier to the output terminals, the current

ramp should be in the order of 1

µsec in width (min). Typical

time delay values are in the 225nsec region at 25

°C. The

delay time increases with device temperature so that at

50

°C, the delay times may be increased by as much as

100nsec.

CMOS CURRENT MODE

PWM CONTROLLERS

TC18C46

TC28C46

TC38C46