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MSP430X11X Datasheet(PDF) 8 Page - Texas Instruments |
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MSP430X11X Datasheet(HTML) 8 Page - Texas Instruments |
8 / 31 page MSP430x11x MIXED SIGNAL MICROCONTROLLERS SLAS196D− DECEMBER 1998 − REVISED SEPTEMBER 2004 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 memory organization Int. Vector 2 KB ROM 128B RAM 16b Per. 8b Per. SFR FFFFh FFE0h FFDFh F800h 027Fh 0200h 01FFh 0100h 00FFh 0010h 000Fh 0000h MSP430C111 Int. Vector 4 KB EPROM 256B RAM 16b Per. 8b Per. SFR FFFFh FFE0h FFDFh 02FFh 0200h 01FFh 0100h 00FFh 0010h 000Fh 0000h MSP430P112 PMS430E112 Int. Vector 4 KB ROM 256B RAM 16b Per. 8b Per. SFR FFFFh FFE0h FFDFh F000h 02FFh 0200h 01FFh 0100h 00FFh 0010h 000Fh 0000h MSP430C112 F000h peripherals Peripherals are connected to the CPU through data, address, and control busses and can be handled using all instructions. For complete module descriptions, refer to the MSP430x1xx Family User’s Guide, literature number SLAU049. oscillator and system clock The clock system is supported by the basic clock module that includes support for a 32768-Hz watch crystal oscillator, an internal digitally-controlled oscillator (DCO) and a high frequency crystal oscillator. The basic clock module is designed to meet the requirements of both low system cost and low-power consumption. The internal DCO provides a fast turn-on clock source and stabilizes in less than 6 µs. The basic clock module provides the following clock signals: D Auxiliary clock (ACLK), sourced from a 32768-Hz watch crystal or a high frequency crystal. D Main clock (MCLK), the system clock used by the CPU. D Sub-Main clock (SMCLK), the sub-system clock used by the peripheral modules. digital I/O There are two 8-bit I/O ports implemented—ports P1 and P2 (only six P2 I/O signals are available on external pins): D All individual I/O bits are independently programmable. D Any combination of input, output, and interrupt conditions is possible. D Edge-selectable interrupt input capability for all the eight bits of port P1 and six bits of port P2. D Read/write access to port-control registers is supported by all instructions. NOTE: Six bits of Port P2, P2.0 to P2.5, are available on external pins − but all control and data bits for Port P2 are implemented. |
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