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SN74ALVCH16270 Datasheet(PDF) 6 Page - Texas Instruments |
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SN74ALVCH16270 Datasheet(HTML) 6 Page - Texas Instruments |
6 / 10 page SN74ALVCH16270 12-BIT TO 24-BIT REGISTERED BUS EXCHANGER WITH 3-STATE OUTPUTS SCES028F – JULY 1995 – REVISED FEBRUARY 1999 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 timing requirements over recommended operating free-air temperature range (unless otherwise noted) (see Figures 1 through 3) VCC = 1.8 V VCC = 2.5 V ± 0.2 V VCC = 2.7 V VCC = 3.3 V ± 0.3 V UNIT MIN MAX MIN MAX MIN MAX MIN MAX fclock Clock frequency † 150 150 150 MHz tw Pulse duration, CLK high or low † 3.3 3.3 3.3 ns A data before CLK ↑ † 4.1 3.8 3.1 B data before CLK ↑ † 0.9 1.2 0.9 tsu Setup time CLKENA1 or CLKENA2 before CLK ↑ † 3.5 3.2 2.7 ns CLKEN1B or CLKEN2B before CLK ↑ † 3.4 3 2.6 OE data before CLK ↑ † 4.4 3.9 3.2 A data after CLK ↑ † 0 0 0.2 B data after CLK ↑ † 1.4 1 1.7 th Hold time CLKENA1 or CLKENA2 after CLK ↑ † 0 0.1 0.3 ns CLKEN1B or CLKEN2B after CLK ↑ † 0 0 0.6 OE after CLK ↑ † 0 0 0.1 † This information was not available at the time of publication. switching characteristics over recommended operating free-air temperature range (unless otherwise noted) (see Figures 1 through 3) PARAMETER FROM (INPUT) TO (OUTPUT) VCC = 1.8 V VCC = 2.5 V ± 0.2 V VCC = 2.7 V VCC = 3.3 V ± 0.3 V UNIT (INPUT) (OUTPUT) MIN TYP MIN MAX MIN MAX MIN MAX fmax † 150 150 150 MHz CLK B † 1.5 5.9 5.8 1.1 5.1 tpd CLK A † 1.2 5.4 5.4 1 4.7 ns SEL A † 1.4 6.2 6.4 1 5.5 ten CLK A or B † 1.5 7 6.8 1 6 ns tdis CLK A or B † 1.9 7.2 6.5 1.1 5.8 ns † This information was not available at the time of publication. operating characteristics, TA = 25°C PARAMETER TEST CONDITIONS VCC = 1.8 V VCC = 2.5 V VCC = 3.3 V UNIT PARAMETER TEST CONDITIONS TYP TYP TYP UNIT C d Power dissipation Outputs enabled CL =50 pF f=10MHz † 87 120 pF Cpd capacitance Outputs disabled CL = 50 pF, f = 10 MHz † 80.5 118 pF † This information was not available at the time of publication. |
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