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SN74ALVCH16901DGG Datasheet(PDF) 4 Page - Texas Instruments

No. de pieza SN74ALVCH16901DGG
Descripción Electrónicos  18-BIT UNIVERSAL BUS TRANSCEIVER WITH PARITY GENERATORS/CHECKERS
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Fabricante Electrónico  TI [Texas Instruments]
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SN74ALVCH16901DGG Datasheet(HTML) 4 Page - Texas Instruments

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SN74ALVCH16901
18-BIT UNIVERSAL BUS TRANSCEIVER
WITH PARITY GENERATORS/CHECKERS
SCES010E – JULY 1995 – REVISED FEBRUARY 1999
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
functional block diagram
A-Port
Parity
Generate
and
Check
B Data
B-Port
Parity
Generate
and
Check
A Data
18-Bit
Storage
18-Bit
Storage
18
18
18
18
2
2
LEAB
1CLKENAB
2CLKENAB
CLKAB
OEAB
1A1–1A8
1APAR
1ERRB
2A1–2A8
2APAR
2ERRB
ODD/EVEN
SEL
OEBA
1B1–1B8
1BPAR
1ERRA
2B1–2B8
2BPAR
2ERRA
1CLKENBA
2CLKENBA
CLKBA
LEBA
QA
QB
5
61
28
36
34
31
35
60
4
37
29
62
64, 33
63
2
1, 32
3
30
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC
–0.5 V to 4.6 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI: Except I/O ports (see Note 1)
–0.5 V to 4.6 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I/O ports (see Notes 1 and 2
–0.5 V to VCC + 0.5 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage range, VO (see Notes 1 and 2)
–0.5 V to VCC + 0.5 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, IIK (VI < 0)
–50 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, IOK (VO < 0)
–50 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, IO
±50 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through each VCC or GND
±100 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance,
θJA (see Note 3)
73
°C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg
–65
°C to 150°C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES:
1. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed..
2. This value is limited to 4.6 V maximum.
3. The package thermal impedance is calculated in accordance with JESD 51.


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