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LC872G06A Datasheet(PDF) 10 Page - Sanyo Semicon Device |
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LC872G06A Datasheet(HTML) 10 Page - Sanyo Semicon Device |
10 / 27 page LC872G08A/06A/04A No.A1400-10/27 Recommended Unused Pin Connections Recommended Unused Pin Connections Port Name Board Software P00 to P07 Open Output low P10 to P17 Open Output low P20 to P21 Open Output low P70 Open Output low CF1/XT1 Pulled low with a 100k Ω resistor or less General-purpose input port CF2/XT2 Pulled low with a 100k Ω resistor or less General-purpose input port Notes on CF1/XT1 and CF2/XT2 pins • When using as general-purpose input ports Since the CF1/XT1 and CF2/XT2 pins are configured as CF oscillator pins at system reset time, it is necessary to add a current limiting resistor of 1k Ω or greater to the CF2/XT2 pin in series when using them as general-purpose input pins. • Differences between flash and mask ROM version System Reset Time State After System Reset is Released CF1/XT1 Set high via the internal Rf resistor CF oscillation state Flash ROM version LC87F2G08A CF2/XT2 Set high CF oscillation state CF1/XT1 Set low via the internal Rf resistor CF oscillation state Mask ROM version LC872G08A/06A/04A CF2/XT2 Set low CF oscillation state Power Pin Treatment Recommendations (VDD1, VSS1) Connect bypass capacitors that meet the following conditions between the VDD1 and VSS1 pins: • Connect among the VDD1 and VSS1 pins and bypass capacitors C1 and C2 with the shortest possible heavy lead wires, making sure that the impedances between the both pins and the bypass capacitors are as equal as possible (L1=L1’, L2=L2’). • Connect a large-capacity capacitor C1 and a small-capacity capacitor C2 in parallel. The capacitance of C2 should be approximately 0.1 μF. VSS1 VDD1 L1’ L2’ L1 L2 C1 C2 |
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