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ADS62P49 Datasheet(PDF) 4 Page - Texas Instruments

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No. de pieza ADS62P49
Descripción Electrónicos  Dual Channel 14-/12-Bit, 250-/210-MSPS ADC With DDR LVDS and Parallel CMOS Outputs
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Fabricante Electrónico  TI [Texas Instruments]
Página de inicio  http://www.ti.com
Logo TI - Texas Instruments

ADS62P49 Datasheet(HTML) 4 Page - Texas Instruments

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ABSOLUTE MAXIMUM RATINGS
(1)
THERMAL CHARACTERISTICS
(1)
ADS62P49 / ADS62P29
ADS62P48 / ADS62P28
SLAS635A – APRIL 2009 – REVISED JUNE 2009............................................................................................................................................................. www.ti.com
PACKAGE/ORDERING INFORMATION(1)
SPECIFIED
PACKAGE-
PACKAGE
ECO
LEAD/BALL
PACKAGE
ORDERING
TRANSPORT
PRODUCT
TEMPERATURE
LEAD
DESIGNATOR
PLAN(2)
FINISH
MARKING
NUMBER
MEDIA,QUANTITY
RANGE
ADS62P49IRGCT,
ADS62P49
AZ62P49
ADS62P49IRGCR
Tape and Reel
ADS62P48IRGCT,
ADS62P48
AZ62P48
GREEN
ADS62P48IRGCR
QFN-64
RGC
–40°C to 85°C
(RoHS and
Cu NiPdAu
ADS62P29IRGCT,
no Sb/Br)
ADS62P29
AZ62P29
ADS62P29IRGCR
Tape and Reel
ADS62P28IRGCT,
ADS62P28
AZ62P28
ADS62P28IRGCR
(1)
For the most current product and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com. or
(2)
Eco Plan – The planned eco-friendly classification: Green (RoHS and no Sb/Br): TI defines “Green” to mean Pb-Free (RoHS compatible)
and free of Bromine (Br) and Antimony (Sb) based flame retardants.
over operating free-air temperature range (unless otherwise noted)
VALUE
UNIT
Supply voltage range, AVDD
–0.3 V to 3.9
V
Supply voltage range, DRVDD
–0.3 V to 2.2
V
Voltage between AGND and DRGND
–0.3 to 0.3
V
Voltage between AVDD to DRVDD (when AVDD leads DRVDD)
0 to 3.3
V
Voltage between DRVDD to AVDD (when DRVDD leads AVDD)
–1.5 to 1.8
V
Voltage applied to external pin, VCM (in external reference mode)
–0.3 to 2.0
V
Voltage applied to analog input pins – INP_A, INM_A, INP_B, INM_B
–0.3V to minimum ( 3.6, AVDD + 0.3V )
V
Voltage applied to input pins - CLKP, CLKM(2), RESET, SCLK, SDATA,
–0.3V to AVDD + 0.3V
V
SEN, CTRL1, CTRL2, CTRL3
TA
Operating free-air temperature range
–40 to 85
°C
TJ
Operating junction temperature range
125
°C
Tstg Storage temperature range
–65 to 150
°C
ESD, human body model
2
kV
(1)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute maximum rated conditions for extended periods may affect device reliability.
(2)
When AVDD is turned off, it is recommended to switch off the input clock (or ensure the voltage on CLKP, CLKM is < |0.3V|. This
prevents the ESD protection diodes at the clock input pins from turning on.
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
RθJA
(2)
Soldered thermal pad, no airflow
22
°C/W
Soldered thermal pad, 200 LFM
15
°C/W
RθJT
(3)
Bottom of package (thermal pad)
0.57
°C/W
(1)
With a JEDEC standard high-K board and 5x5 via array. See Exposed Pad in the Application Information.
(2)
RθJA is the thermal resistance from the junction to ambient.
(3)
RθJT is the thermal resistance from the junction to the thermal pad.
4
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Copyright © 2009, Texas Instruments Incorporated
Product Folder Link(s): ADS62P49 / ADS62P29 ADS62P48 / ADS62P28


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