Motor de Búsqueda de Datasheet de Componentes Electrónicos
  Spanish  ▼
ALLDATASHEET.ES

X  

TSB12LV32I Datasheet(PDF) 80 Page - Texas Instruments

No. de pieza TSB12LV32I
Descripción Electrónicos  IEEE 1394-1995 and P1394a Compliant General-Purpose Link-Layer Controller
Download  113 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Fabricante Electrónico  TI [Texas Instruments]
Página de inicio  http://www.ti.com
Logo TI - Texas Instruments

TSB12LV32I Datasheet(HTML) 80 Page - Texas Instruments

Back Button TSB12LV32I Datasheet HTML 76Page - Texas Instruments TSB12LV32I Datasheet HTML 77Page - Texas Instruments TSB12LV32I Datasheet HTML 78Page - Texas Instruments TSB12LV32I Datasheet HTML 79Page - Texas Instruments TSB12LV32I Datasheet HTML 80Page - Texas Instruments TSB12LV32I Datasheet HTML 81Page - Texas Instruments TSB12LV32I Datasheet HTML 82Page - Texas Instruments TSB12LV32I Datasheet HTML 83Page - Texas Instruments TSB12LV32I Datasheet HTML 84Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 80 / 113 page
background image
6–2
Step 2:
Writing the next (n-1) quadlets of the packet:
a)
Write the first 8-bits of each quadlet to ATF location 54h.
b)
Write the second 8-bits of each quadlet to ATF location 55h.
c)
Write the third 8-bits of each quadlet to ATF location 56h.
d)
Write the fourth 8-bits of each quadlet to ATF location 57h.
The data is not yet confirmed for transmission.
Step 3:
Last (Nth) quadlet of the packet:
a)
Write the first 8-bits of the quadlet to ATF location 58h.
b)
Write the second 8-bits of the quadlet to ATF location 59h.
c)
Write the third 8-bits of the quadlet to ATF location 5Ah.
d)
Write the fourth 8-bits of the quadlet to ATF location 5Bh.
The data is now confirmed for transmission.
To write to the ATF in a word fashion, the following steps should be followed:
Step 1:
Writing the first quadlet of the packet:
a)
Write the first 16-bits of the quadlet to ATF location 50h.
b)
Write the second 16-bits of the quadlet to ATF location 52h.
The data is not yet confirmed for transmission.
Step 2:
Writing the next (n-1) quadlets of the packet:
a)
Write the first 16-bits of each quadlet to ATF location 54h.
b)
Write the second 16-bits of each quadlet to ATF location 56h.
The data is not yet confirmed for transmission.
Step 3:
Last (Nth) quadlet of the packet:
a)
Write the first 16-bits of the quadlet to ATF location 58h.
b)
Write the second 16-bits of the quadlet to ATF location 5Ah.
The data is now confirmed for transmission.
All writes to the ATF must be quadlet aligned (i.e., only an even number of write accesses is allowed). If the
first quadlet of a packet is not written to the ATF_First location, the transmitter enters a state denoted by an
ATStuck interrupt. An underflow of the ATF also causes an ATSTK interrupt. When this state is entered, no
asynchronous packets can be sent until the ATF is cleared by way of the ATFCLR control bit (bit 0 at CFR
30h). However isochronous packets may still be sent while the ATF is in this state.
6.3
ATF Burst Access
It is allowable to perform a burst write into location 54h (ATF_Continue), which allows multiple quadlets to
load into ATF, but the data is not confirmed for transmission. It is also allowable to perform burst write to
location 58h (ATF_Continue & Update), which allows multiple quadlets to load into ATF, and the data is
confirmed for transmission. Write accesses to address 5Ch (ATF_Burst Write) writes the whole packet into
the ATF. The first quadlet written into ATF has the control bit set to 1 to indicate this is the first quadlet of
the packet, and the rest of the quadlets have the CD bit set to 0. The last quadlet written into ATF confirms
the packet for transmission.
To do a burst write operation the host bus master must continually drive MCS low. The TSB12LV32 loads
MD0–MD15 to the ATF during each rising edge of BCLK while MCS is low. At the same time it asserts MCA
(MCA is always one cycle behind MCS) low. The CD bit is 0 for ATF_Continue and ATF_Continue & Update.
The ATF_First_Update is a unique address location optimised for transmitting zero length isochronous
packets (including asynchronous streaming packets). A zero-length packet contains no data payload, and
only the packet header and header CRC are transmitted.
6.4
General-Receive-FIFO (GRF)
Access to the GRF is done with a read from the GRF, which requires a read from address 60h. The GRF
will accumulate self-ID packets upon bus-reset. All quadlets of a self-ID packet are saved in the GRF after


Número de pieza similar - TSB12LV32I

Fabricante ElectrónicoNo. de piezaDatasheetDescripción Electrónicos
logo
Texas Instruments
TSB12LV32I TI1-TSB12LV32I Datasheet
91Kb / 7P
[Old version datasheet]   IEEE 1394-1995 and P1394a Compliant General-Purpose Link-Layer Controller for Computer Peripherals and Consumer Audio/Video Electronics
TSB12LV32IPZG4 TI1-TSB12LV32IPZG4 Datasheet
91Kb / 7P
[Old version datasheet]   IEEE 1394-1995 and P1394a Compliant General-Purpose Link-Layer Controller for Computer Peripherals and Consumer Audio/Video Electronics
More results

Descripción similar - TSB12LV32I

Fabricante ElectrónicoNo. de piezaDatasheetDescripción Electrónicos
logo
Texas Instruments
TSB12LV32-EP TI1-TSB12LV32-EP Datasheet
1Mb / 105P
[Old version datasheet]   IEEE 1394-1995 and P1394a Compliant General-Purpose Link-Layer Controller
TSB12LV31 TI-TSB12LV31 Datasheet
257Kb / 73P
[Old version datasheet]   IEEE 1394-1995 General-Purpose Link-Layer Controller
TSB12LV32 TI1-TSB12LV32_14 Datasheet
91Kb / 7P
[Old version datasheet]   IEEE 1394-1995 and P1394a Compliant General-Purpose Link-Layer Controller for Computer Peripherals and Consumer Audio/Video Electronics
TSB12LV41 TI-TSB12LV41 Datasheet
737Kb / 195P
[Old version datasheet]   IEEE 1394-1995 Link-Layer Controller for Consumer Applications
TSB12LV41A TI-TSB12LV41A Datasheet
587Kb / 199P
[Old version datasheet]   IEEE 1394-1995 Link-Layer Controller for Consumer Applications
TSB12LV42 TI-TSB12LV42 Datasheet
686Kb / 175P
[Old version datasheet]   IEEE 1394-1995 Link-Layer Controller for Digital Video
TSB12LV01B TI-TSB12LV01B Datasheet
438Kb / 77P
[Old version datasheet]   IEEE 1394-1995 HIGH SPEED SERIAL BUS LINK LAYER CONTROLLER
TSB12LV01B TI1-TSB12LV01B_14 Datasheet
86Kb / 6P
[Old version datasheet]   IEEE 1394-1995 High-Speed Serial-Bus Link-Layer Controller
TSB12LV01B-EP TI1-TSB12LV01B-EP Datasheet
402Kb / 78P
[Old version datasheet]   IEEE 1394-1995 High-Speed Serial-Bus Link-Layer Controller
TSB12LV21B TI-TSB12LV21B Datasheet
299Kb / 22P
[Old version datasheet]   IEEE 1394 LINK LAYER CONTROLLER
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Descarga

Go To PDF Page


Enlace URL




Política de Privacidad
ALLDATASHEET.ES
¿ALLDATASHEET es útil para Ud.?  [ DONATE ] 

Todo acerca de Alldatasheet   |   Publicidad   |   Contáctenos   |   Política de Privacidad   |   Intercambio de Enlaces   |   Lista de Fabricantes
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com