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UC19432 Datasheet(PDF) 3 Page - Texas Instruments |
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UC19432 Datasheet(HTML) 3 Page - Texas Instruments |
3 / 5 page 3 UC19432 UC29432 UC39432 UC39432B COLL: The collector of the output transistor with a maxi- mum voltage of 36V. This pin is the output of the transconductance amplifier. The overall open loop volt- age gain of the transconductance amplifier is gm • RL, where gm is designed to be –140mS ±30mS and RL rep- resents the output load. COMP: The output of the error amplifier and the input to the transconductance amplifier. This pin is available to compensate the high frequency gain of the error ampli- fier. It is internally voltage limited to approximately 2.0V. EA+: The non-inverting input to the error amplifier. GND: The reference and power ground for the device. The power ground of the output transistor is isolated on the chip from the substrate ground used to bias the re- mainder of the device. ISET: The current set pin for the transconductance ampli- fier. The transconductance will be –140mS as specified in the electrical table if this pin is grounded. If a resis- tance RL is added to the ISET pin, the resulting new transconductance is calculated using the following equa- tion: gm = –0.714V • (5.1 +RL). The maximum current will be approximately I V R MAX L = + 06 51 . . Ω REF: The output of the trimmed precision reference. It can source or sink 10 A and still maintain the 1% tem- perature specification. SENSE: The inverting terminal of the error amplifier used as both the voltage sense input to the error amplifier and its other compensation point. The error amplifier uses the SENSE input to compare against the 1.3V on-chip refer- ence. The SENSE pin is also used as the undervoltage lockout (UVLO). It is intended to keep the chip from operating un- til the internal reference is properly biased. The threshold is approximately 1V. It is important that once the UVLO is released, the error amplifier can drive the transconductance amplifier to stabilize the loop. If a ca- pacitor is connected between the SENSE and COMP pins to create a pole, it will limit the slew rate of the error amplifier. To increase the bandwidth and ensure startup at low load current, it is recommended to create a zero along with the pole as shown in the UC39431 shunt reg- ulator application. The error amplifier must slew 2.0V to drive the transconductance amplifier initially on. VCC: The power connection for the device. The minimum to maximum operating voltage is 2.2V to 36.0V. The qui- escent current is typically 0.50mA. PIN DESCRIPTIONS Figure 1. 5.0V Optocoupler application. UDG-95094 |
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