ADIS16220 datasheet(5/16 Pages) AD

No. de pieza	ADIS16220

Descripción Electrónicos	Programmable Digital Vibration Sensor

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Fabricante Electrónico	AD [Analog Devices]

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Preliminary Technical Data

ADIS16220

Rev. PrE | Page 5 of 16

TIMING SPECIFICATIONS

TA = 25°C, VDD = 3.3 V, unless otherwise noted.

Table 2.

Parameter

Description

Min1

Typ

Max

Unit

fSCLK

SCLK frequency

0.01

2.25

MHz

tSTALL

Stall period between data, between 16th and 17th SCLK

15.4

μs

tCS

Chip select to SCLK edge

48.8

ns

tDAV

DOUT valid after SCLK edge

100

ns

tDSU

DIN setup time before SCLK rising edge

24.4

ns

tDHD

DIN hold time after SCLK rising edge

48.8

ns

tSCLKR, tSCLKF

SCLK rise/fall times

5

12.5

ns

tSR

SCLK high pulse width

12.5

ns

tSF

SCLK low pulse width

12.5

ns

tDF, tDR

DOUT rise/fall times

5

12.5

ns

tSFS

CS high after SCLK edge

5

ns

1 Guaranteed by design, not tested.

TIMING DIAGRAMS

CS

SCLK

DOUT

DIN

1

2

3

4

5

6

15

16

W/R

A5

A6

A4

A3

A2

D2

MSB

DB14

D1

LSB

DB13

DB12

DB10

DB11

DB2

LSB

DB1

tCS

tSFS

tDAV

tSR

tSF

tDHD

tDSU

Figure 2. SPI Timing and Sequence

CS

SCLK

tSTALL

Figure 3. DIN Bit Sequence

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