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SMT4214 Datasheet(PDF) 11 Page - Summit Microelectronics, Inc. |
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SMT4214 Datasheet(HTML) 11 Page - Summit Microelectronics, Inc. |
11 / 20 page SMT4214 Preliminary Information Summit Microelectronics, Inc 2061 2.2 09/15/05 11 I2C 2-WIRE SERIAL INTERFACE AC OPERATING CHARACTERISTICS - 100kHz (Over recommended operating conditions, unless otherwise noted. All voltages are relative to GND.) See Figure 6 Timing diagram. Symbol Description Conditions Min Typ Max Units fSCL SCL Clock Frequency 0 100 KHz tLOW Clock Low Period 4.7 µs tHIGH Clock High Period 4.0 µs tBUF Bus Free Time Before New Transmission Note 1/ 4.7 µs tSU:STA Start Condition Setup Time 4.7 µs tHD:STA Start Condition Hold Time 4.0 µs tSU:STO Stop Condition Setup Time 4.7 µs tAA Clock Edge to Data Valid SCL low to valid SDA (cycle n) 0.2 3.5 µs tDH Data Output Hold Time SCL low (cycle n+1) to SDA change 0.2 µs tR SCL and SDA Rise Time Note 1/ 1000 ns tF SCL and SDA Fall Time Note 1/ 300 ns tSU:DAT Data In Setup Time 250 ns tHD:DAT Data In Hold Time 0 ns TI Noise Filter SCL and SDA Noise suppression 100 ns tWR Write Cycle Time VGG_CAP Capacitor =1uF, VGG_CAP=10.5V 100 ms Note: 1/ - Guaranteed by Design. TIMING DIAGRAMS t R t F t HIGH t LOW t SU:SDA t HD:SDA t SU:DAT t HD:DAT t SU:STO t BUF t DH t AA SCL SDA (IN) SDA (OUT) t W R (For W rite Operation Only) Figure 6 . Basic I 2C Serial Interface Timing |
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