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ADP3629ARMZ-R7 Datasheet(PDF) 7 Page - Analog Devices |
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ADP3629ARMZ-R7 Datasheet(HTML) 7 Page - Analog Devices |
7 / 16 page ADP3629/ADP3630/ADP3631 Rev. 0 | Page 7 of 16 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS SD 1 INA 2 PGND 3 INB 4 OTW 8 OUTA 7 VDD 6 OUTB 5 ADP3629 TOP VIEW (Not to Scale) Figure 7. ADP3629 Pin Configuration Table 4. ADP3629 Pin Function Descriptions Pin No. Mnemonic Description 1 SD Output Shutdown. When high, this pin disables normal operation, forcing OUTA and OUTB low. 2 INA Inverting Input Pin for Channel A Gate Driver. 3 PGND Ground. This pin should be closely connected to the source of the power MOSFET. 4 INB Inverting Input Pin for Channel B Gate Driver. 5 OUTB Output Pin for Channel B Gate Driver. 6 VDD Power Supply Voltage. Bypass this pin to PGND with a 1 μF to 5 μF ceramic capacitor. 7 OUTA Output Pin for Channel A Gate Driver. 8 OTW Overtemperature Warning Flag. Open drain, active low. SD 1 INA 2 PGND 3 INB 4 OTW 8 OUTA 7 VDD 6 OUTB 5 ADP3630 TOP VIEW (Not to Scale) Figure 8. ADP3630 Pin Configuration Table 5. ADP3630 Pin Function Descriptions Pin No. Mnemonic Description 1 SD Output Shutdown. When high, this pin disables normal operation, forcing OUTA and OUTB low. 2 INA Input Pin for Channel A Gate Driver. 3 PGND Ground. This pin should be closely connected to the source of the power MOSFET. 4 INB Input Pin for Channel B Gate Driver. 5 OUTB Output Pin for Channel B Gate Driver. 6 VDD Power Supply Voltage. Bypass this pin to PGND with a 1 μF to 5 μF ceramic capacitor. 7 OUTA Output Pin for Channel A Gate Driver. 8 OTW Overtemperature Warning Flag. Open drain, active low. SD 1 INA 2 PGND 3 INB 4 OTW 8 OUTA 7 VDD 6 OUTB 5 ADP3631 TOP VIEW (Not to Scale) Figure 9. ADP3631 Pin Configuration Table 6. ADP3631 Pin Function Descriptions Pin No. Mnemonic Description 1 SD Output Shutdown. When high, this pin disables normal operation, forcing OUTA and OUTB low. 2 INA Inverting Input Pin for Channel A Gate Driver. 3 PGND Ground. This pin should be closely connected to the source of the power MOSFET. 4 INB Input Pin for Channel B Gate Driver. 5 OUTB Output Pin for Channel B Gate Driver. 6 VDD Power Supply Voltage. Bypass this pin to PGND with a 1 μF to 5 μF ceramic capacitor. 7 OUTA Output Pin for Channel A Gate Driver. 8 OTW Overtemperature Warning Flag. Open drain, active low. |
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