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AM3517 Datasheet(PDF) 14 Page - Texas Instruments |
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AM3517 Datasheet(HTML) 14 Page - Texas Instruments |
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14 / 184 page  AM3517/05 ARM Microprocessor SPRS550 – OCTOBER 2009 www.ti.com Table 2-1. Ball Characteristics (ZCN Pkg.) (continued) BALL PIN NAME MODE [3] TYPE [4] BALL BALL RESET REL. POWER [8] VOLTAGE HYS [10] LOAD (pF) PULL U/D IO CELL [13] LOCATION [2] RESET RESET REL. MODE [7] [9] [11] TYPE [12] [1] STATE [5] STATE [6] F1 gpmc_a9 0 O H PU 7 VDDSHV 1.8V/3.3V Yes 30 PU/ PD LVCMOS sys_ 1 I ndmareq2 gpio_42 4 IO safe_mode 7 G6 gpmc_a10 0 O H PU 7 VDDSHV 1.8V/3.3V Yes 30 PU/ PD LVCMOS sys_ 1 I ndmareq3 gpio_43 4 IO safe_mode 7 G5 gpmc_d0 0 IO H PU 0 VDDSHV 1.8V/3.3V 30 PU/ PD LVCMOS G4 gpmc_d1 0 IO H PU 0 VDDSHV 1.8V/3.3V Yes 30 PU/ PD LVCMOS G3 gpmc_d2 0 IO H PU 0 VDDSHV 1.8V/3.3V Yes 30 PU/ PD LVCMOS G2 gpmc_d3 0 IO H PU 0 VDDSHV 1.8V/3.3V Yes 30 PU/ PD LVCMOS G1 gpmc_d4 0 IO H PU 0 VDDSHV 1.8V/3.3V Yes 30 PU/ PD LVCMOS H2 gpmc_d5 0 IO H PU 0 VDDSHV 1.8V/3.3V Yes 30 PU/ PD LVCMOS H1 gpmc_d6 0 IO H PU 0 VDDSHV 1.8V/3.3V Yes 30 PU/ PD LVCMOS J5 gpmc_d7 0 IO H PU 0 VDDSHV 1.8V/3.3V Yes 30 PU/ PD LVCMOS J4 gpmc_d8 0 IO H PU 0 VDDSHV 1.8V/3.3V Yes 30 PU/ PD LVCMOS gpio_44 4 IO J3 gpmc_d9 0 IO H PU 0 VDDSHV 1.8V/3.3V Yes 30 PU/ PD LVCMOS gpio_45 4 IO J2 gpmc_d10 0 IO H PU 0 VDDSHV 1.8V/3.3V Yes 30 PU/ PD LVCMOS gpio_46 4 IO J1 gpmc_d11 0 IO H PU 0 VDDSHV 1.8V/3.3V Yes 30 PU/ PD LVCMOS gpio_47 4 IO K4 gpmc_d12 0 IO H PU 0 VDDSHV 1.8V/3.3V Yes 30 PU/ PD LVCMOS gpio_48 4 IO K3 gpmc_d13 0 IO H PU 0 VDDSHV 1.8V/3.3V Yes 30 PU/ PD LVCMOS gpio_49 4 IO K2 gpmc_d14 0 IO H PU 0 VDDSHV 1.8V/3.3V Yes 30 PU/ PD LVCMOS gpio_50 4 IO K1 gpmc_d15 0 IO H PU 0 VDDSHV 1.8V/3.3V Yes 30 PU/ PD LVCMOS gpio_51 4 IO L2 gpmc_ncs0 0 O H Z 0 VDDSHV 1.8V/3.3V No 30 NA LVCMOS L1 gpmc_ncs1 0 O H Z 0 VDDSHV 1.8V/3.3V Yes 30 PU/ PD LVCMOS gpio_52 4 IO M4 gpmc_ncs2 0 O H PU 7 VDDSHV 1.8V/3.3V Yes 30 PU/ PD LVCMOS gpt9_pwm_e 2 IO vt gpio_53 4 IO safe_mode 7 M3 gpmc_ncs3 0 O H PU 7 VDDSHV 1.8V/3.3V Yes 30 PU/ PD LVCMOS sys_ 1 I ndmareq0 gpt10_pwm_ 2 IO evt gpio_54 4 IO safe_mode 7 M2 gpmc_ncs4 0 O H PU 7 VDDSHV 1.8V/3.3V Yes 30 PU/ PD LVCMOS sys_ 1 I ndmareq1 gpt9_pwm_e 3 IO vt gpio_55 4 IO safe_mode 7 M1 gpmc_ncs5 0 O H PU 7 VDDSHV 1.8V/3.3V Yes 30 PU/ PD LVCMOS TERMINAL DESCRIPTION 14 Submit Documentation Feedback |
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