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ATmega16U2 Datasheet(PDF) 48 Page - ATMEL Corporation |
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ATmega16U2 Datasheet(HTML) 48 Page - ATMEL Corporation |
48 / 314 page 48 7799B–AVR–07/09 ATmega8U2/16U2/32U2 Figure 10-1. Reset Logic 10.2.1 Power-on Reset A Power-on Reset (POR) pulse is generated by an On-chip detection circuit. The detection level is defined in “System and Reset Characteristics” on page 267. The POR is activated whenever V CC is below the detection level. The POR circuit can be used to trigger the start-up Reset, as well as to detect a failure in supply voltage. A Power-on Reset (POR) circuit ensures that the device is reset from Power-on. Reaching the Power-on Reset threshold voltage invokes the delay counter, which determines how long the device is kept in RESET after V CC rise. The RESET signal is activated again, without any delay, when V CC decreases below the detection level. Figure 10-2. MCU Start-up, RESET Tied to V CC MCU Status Register (MCUSR) Brown-out Reset Circuit BODLEVEL [2..0] Delay Counters CKSEL[3:0] CK TIMEOUT DATA BUS Clock Generator SPIKE FILTER Pull-up Resistor USB Device Reset Detection Watchdog Oscillator SUT[1:0] Power-on Reset Circuit V RESET TIME-OUT INTERNAL RESET t TOUT V POT V RST CC |
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