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SN74AUP2G79DQER Datasheet(PDF) 1 Page - Texas Instruments

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No. de pieza SN74AUP2G79DQER
Descripción Electrónicos  LOW-POWER DUAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP
Download  14 Pages
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Fabricante Electrónico  TI [Texas Instruments]
Página de inicio  http://www.ti.com
Logo TI - Texas Instruments

SN74AUP2G79DQER Datasheet(HTML) 1 Page - Texas Instruments

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DCU PACKAGE
(TOP VIEW)
1
8
2
7
3
6
1CLK
1D
2Q
GND
4
5
V
CC
1Q
2D
2CLK
RSE PACKAGE
(TOP VIEW)
1
7
2
6
8
3
5
4
V
CC
1Q
2D
2CLK
GND
1CLK
1D
2Q
YFP PACKAGE
(TOP VIEW)
1 8
V
CC
2 7
1Q
3 6
2D
1CLK
1D
2Q
GND
4 5
2CLK
1
8
2
7
3
6
1CLK
1D
2Q
GND 4
5
V
CC
1Q
2D
2CLK
DQE PACKAGE
(TOP VIEW)
D1
D2
C1
C2
B1
B2
A1
A2
(A)
Single, dual, and triple gates
Static-Power Consumption
(µA)
AUP
AUP
3.3-V
Logic
(A)
0%
20%
40%
60%
80%
100%
Dynamic-Power Consumption
(pF)
AUP
AUP
3.3-V
Logic
(A)
0%
20%
40%
60%
80%
100%
Switching Characteristics
at 25 MHz
(A)
-0.5
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
0
5
10
15
20
25
30
35
40
45
Time (ns)
Output
Input
(A) SN74AUP2Gxx data at C = 15 pF.
L
SN74AUP2G79
www.ti.com
SCES755A – DECEMBER 2009 – REVISED DECEMBER 2009
LOW-POWER DUAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP
Check for Samples: SN74AUP2G79
1
FEATURES
Available in the Texas Instruments NanoStar™
Optimized for 3.3-V Operation
Package
3.6-V I/O Tolerant to Support Mixed-Mode
Low Static-Power Consumption
Signal Operation
(ICC = 0.9 μA Maximum)
tpd = 4 ns Maximum at 3.3 V
Low Dynamic-Power Consumption
Suitable for Point-to-Point Applications
(Cpd = 3 pF Typ at 3.3 V)
Latch-Up Performance Exceeds 100 mA Per
Low Input Capacitance (Ci = 1.5 pF Typical)
JESD 78, Class II
Low Noise – Overshoot and Undershoot
ESD Performance Tested Per JESD 22
<10% of VCC
2000-V Human-Body Model
Ioff Supports Partial-Power-Down Mode
(A114-B, Class II)
Operation
1000-V Charged-Device Model (C101)
Wide Operating VCC Range of 0.8 V to 3.6 V
See mechanical drawings for dimensions.
DESCRIPTION/ORDERING INFORMATION
The AUP family is TI's premier solution to the industry's low-power needs in battery-powered portable
applications. This family ensures a very low static- and dynamic-power consumption across the entire VCC range
of 0.8 V to 3.6 V, resulting in increased battery life (see Figure 1). This product also maintains excellent signal
integrity (see the very low undershoot and overshoot characteristics shown in Figure 2).
Figure 1. AUP – The Lowest-Power Family
Figure 2. Excellent Signal Integrity
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2009, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.


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