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BA823F Datasheet(PDF) 3 Page - Rohm

No. de pieza BA823F
Descripción Electrónicos  Serial-Parallel 3-input Driver
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Fabricante Electrónico  ROHM [Rohm]
Página de inicio  http://www.rohm.com
Logo ROHM - Rohm

BA823F Datasheet(HTML) 3 Page - Rohm

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BA823F
Technical Note
3/8
www.rohm.com
2009.06 - Rev.A
© 2009 ROHM Co., Ltd. All rights reserved.
Block diagram
Pin descriptions
Pin No.
Pin Name
Symbol
Function
2
SHIFT PULSE
C
Shift pulse of shift register
15
DATA INPUT
D1
Data input of shift register is stored during the shift pulse rise time.
1
STROBE
S
When “1” is effective, the content of shift register is outputted.
12
OUTPUT
Ō 0
“0” is effective when the content of register is “1” on the 1st bit is outputted.
11
OUTPUT
Ō 1
“0” is effective when the content of register is “1” on the 2nd bit is outputted.
10
OUTPUT
Ō 2
“0” is effective when the content of register is “1” on the 3rd bit is outputted.
9
OUTPUT
Ō 3
“0” is effective when the content of register is “1” on the 4th bit is outputted.
8
OUTPUT
Ō 4
“0” is effective when the content of register is “1” on the 5th bit is outputted.
7
OUTPUT
Ō 5
“0” is effective when the content of register is “1” on the 6tht bit is outputted.
6
OUTPUT
Ō 6
“0” is effective when the content of register is “1” on the 7tht bit is outputted.
5
OUTPUT
Ō7
“0” is effective when the content of register is “1” on the 8th bit is outputted.
3
DATA OUTPUT
Do
Data having passed through the output circuit of Ō7 becomes the input of the next stage
16
VCC
VCC
5.0V .is used normally (±10%)
13
GND
GND1
Especially, GND of the output circuit of Ō 0~ Ō 3
4
GND
GND2
Especially, GND of the output circuit of Ō 4~ Ō7
14
GND
GND(Dig)
Especially, GND of the logic circuit
Description of operation
BA823 is configured internally as shown in the block diagram. Terminals of clock C, data D1, and strobe S are used as input.
Data input is synchronized with the clock, read serially during the rise time and latched at the rise time edge of the shifted
shift register. The content of the set shift register appears on the output terminal of Ō0~ Ō7 when the strobe is input, as
shown in the time chart of Fig.5. Pulse width is the same as that of the strobe input pulse.
Data output terminal D0, is a terminal used for cascade connection of the IC, where the output of the final stage of the shift
register has appeared, and is connected to the next data input terminal D1. In this case, when the clock and the strobe are
used in conjunction, output terminal can be increased by 8 bits at a time.
1
15
2
16
3
13
4
14
12
11
10
9
8
7
6
5
DATA OUTPUT DO
GND1
GND2
GND
(Dig)
VCC
STROBE INPUT S
DATA INPUT D4
SHIFT PULSE C
Ō 0
Ō 1
Ō 2
Ō 3
Ō 4
Ō 5
Ō 6
Ō 7


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