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74ALVC125D Datasheet(PDF) 6 Page - NXP Semiconductors |
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74ALVC125D Datasheet(HTML) 6 Page - NXP Semiconductors |
6 / 13 page 74ALVC125_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 10 January 2008 6 of 13 NXP Semiconductors 74ALVC125 Quad buffer/line driver; 3-state [1] Typical values are measured at Tamb =25 °C [2] tpd is the same as tPHL and tPLH. ten is the same as tPZH and tPZL. tdis is the same as tPHZ and tPLZ. [3] CPD is used to determine the dynamic power dissipation (PD in µW). PD =CPD × VCC2 × fi × N+ Σ(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz CL = output load capacitance in pF VCC = supply voltage in Volts N = number of inputs switching Σ(C L × VCC 2 × f o) = sum of the outputs 11. Waveforms CPD power dissipation capacitance per buffer; VI = GND to VCC; VCC = 3.3 V [3] outputs HIGH or LOW state - 27 - pF outputs 3-state - 5 - pF Table 7. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 8. Symbol Parameter Conditions −40 °C to +85 °C Unit Min Typ[1] Max Measurement points are given in Table 8. VOL and VOH are the typical output voltage levels that occur with the output load. Fig 6. Input nA to output nY propagation delay times mna230 tPHL tPLH VM VM nA input nY output GND VI VOH VOL Table 8. Measurement points Supply voltage Input Output VCC VM VM VX VY 1.65 V to 1.95 V 0.5VCC 0.5VCC VOL + 0.15 V VOH − 0.15 V 2.3 V to 2.7 V 0.5VCC 0.5VCC VOL + 0.15 V VOH − 0.15 V 2.7 V 1.5 V 1.5 V VOL + 0.3 V VOH − 0.3 V 3.0 V to 3.6 V 1.5 V 1.5 V VOL + 0.3 V VOH − 0.3 V |
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